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author | Giovanni Cabiddu <giovanni.cabiddu@intel.com> | 2021-12-24 11:05:32 +0000 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2021-12-31 18:10:56 +1100 |
commit | 4cab5dfd15b77cde2b965bbf71a86876a42684da (patch) | |
tree | 3fc7c562015022854b3f14c6b06a2c191104a465 /drivers/crypto | |
parent | c5d692a2335d64ac390aeb8ab6c4ac9f662e1be4 (diff) | |
download | lwn-4cab5dfd15b77cde2b965bbf71a86876a42684da.tar.gz lwn-4cab5dfd15b77cde2b965bbf71a86876a42684da.zip |
crypto: qat - fix definition of ring reset results
The ring reset result values are defined starting from 0x1 instead of 0.
This causes out-of-tree drivers that support this message to understand
that a ring reset failed even if the operation was successful.
Fix by starting the definition of ring reset result values from 0.
Fixes: 0bba03ce9739 ("crypto: qat - add PFVF support to enable the reset of ring pairs")
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reported-by: Adam Guerin <adam.guerin@intel.com>
Reviewed-by: Marco Chiappero <marco.chiappero@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/qat/qat_common/adf_pfvf_msg.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/crypto/qat/qat_common/adf_pfvf_msg.h b/drivers/crypto/qat/qat_common/adf_pfvf_msg.h index 86b0e7baa4d3..9c37a2661392 100644 --- a/drivers/crypto/qat/qat_common/adf_pfvf_msg.h +++ b/drivers/crypto/qat/qat_common/adf_pfvf_msg.h @@ -139,10 +139,10 @@ enum pf2vf_compat_response { }; enum ring_reset_result { - RPRESET_SUCCESS = 0x01, - RPRESET_NOT_SUPPORTED = 0x02, - RPRESET_INVAL_BANK = 0x03, - RPRESET_TIMEOUT = 0x04, + RPRESET_SUCCESS = 0x00, + RPRESET_NOT_SUPPORTED = 0x01, + RPRESET_INVAL_BANK = 0x02, + RPRESET_TIMEOUT = 0x03, }; #define ADF_VF2PF_RNG_RESET_RP_MASK GENMASK(1, 0) |