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path: root/drivers/media/platform/qcom
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2026-10-02media: iris: fix 64-bit division in iris_set_slice_count()Sasha Levin
32-bit ARM builds fail at modpost: ERROR: modpost: drivers/media/platform/qcom/iris/qcom-iris.ko: symbol '__aeabi_ldivmod' undefined! The maximum average slice size in MAX_BYTES mode is derived from the BITRATE capability, whose value is an s64, so both the division by the frame rate and the DIV_ROUND_UP() by the number of slices are 64-bit divisions. 32-bit ARM has no instruction for these and the compiler emits calls to __aeabi_ldivmod(), which the kernel does not provide. The bitrate is always positive, so use div_u64() for the division by the frame rate and DIV_ROUND_UP_ULL() for the rounding. Include <linux/math64.h> for div_u64() instead of relying on it being pulled in indirectly. Reported-by: kernelci.org bot <bot@kernelci.org> Closes: https://d.kernelci.org/i/maestro:4935f1aae20e7f957e60f8fde09c4e6d153c7909 Fixes: 5f21cd9a4ae4 ("media: iris: add support for multi_slice in iris encoder") Assisted-by: LLM Signed-off-by: Sasha Levin <sashal@kernel.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-09-29media: iris: add support for multi_slice in iris encoderSachin Kumar Garg
Add multi-slice encoding support with MAX_MB and MAX_BYTES modes. Clients can enable slice mode using V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE control and configure slice size via V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB or V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES controls. Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Sachin Kumar Garg <sachin.garg@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: force stage 1 work mode for CBR RC on encoderSachin Kumar Garg
iris_set_stage() currently always picks STAGE_2 for encoder sessions. CBR rate control requires stage 1 operation, so force STAGE_1 when BITRATE_MODE is set to CBR. The BITRATE_MODE fw_cap value is used instead of inst->hfi_rc_type since STAGE precedes BITRATE_MODE in enum platform_inst_fw_cap_type, so iris_set_properties() would still see the previous hfi_rc_type when iris_set_stage() runs during initial config Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Sachin Kumar Garg <sachin.garg@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: cache work mode after computing it in iris_set_stageSachin Kumar Garg
iris_set_stage() computes work_mode and sends it to firmware but never updates inst->fw_caps[STAGE].value, leaving the cached STAGE value stale. iris_vpu_enc_bin_size() and iris_vpu3x_vpu4x_calculate_frequency() read this cached value, so a stale default causes them to miscalculate buffer size and clock frequency for sessions actually running in a different stage than the cached one. Update inst->fw_caps[cap_id].value with the computed work_mode before sending it to firmware, keeping the cache consistent with what is actually configured. Fixes: 3a19d7b9e08b ("media: iris: implement set properties to firmware during streamon") Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Sachin Kumar Garg <sachin.garg@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: reference count video instancesDmitry Baryshkov
iris_get_instance() looks up an instance on core->instances and returns it after dropping core->lock, without taking any reference. The threaded interrupt handler uses this to find the instance a firmware response belongs to and then takes inst->lock. Meanwhile userspace may close the same file descriptor: iris_close() removes the instance from the list, destroys inst->lock and frees the instance. The interrupt handler then operates on freed memory and a destroyed mutex, a use-after-free. Add a kref to struct iris_inst. iris_get_instance() takes a reference under core->lock, so an instance it returns cannot be freed until the caller drops that reference with iris_inst_put(). The instance is released (mutexes destroyed, memory freed) only when the last reference goes away, whether that is held by the closing thread or the interrupt handler. Fixes: 38fc8beaba55 ("media: iris: implement reqbuf ioctl with vb2_queue_setup") Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: reject open() when the session limit is reachedDmitry Baryshkov
iris_add_session() silently skips adding the instance to core->instances once max_session_count is reached, but returns void, so iris_open() continues as if it succeeded and hands a file descriptor back to userspace. As the instance is not on core->instances, firmware responses for it are dropped and every subsequent ioctl times out. Make iris_add_session() return an error when the limit is reached and fail iris_open() accordingly, freeing the partially initialised instance. Fixes: 38fc8beaba55 ("media: iris: implement reqbuf ioctl with vb2_queue_setup") Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: guard against a NULL hfi_sys_ops in the interrupt handlerDmitry Baryshkov
core->hfi_sys_ops is populated only during core bring-up, once the firmware generation has been detected. iris_vpu_power_on() enables interrupts earlier than that, so an interrupt (for instance a spurious one) that fires in this window makes iris_hfi_isr_handler() unconditionally dereference a NULL core->hfi_sys_ops and panic. Skip the response handler when hfi_sys_ops has not been set up yet; the interrupt is still acknowledged and the line re-enabled. Fixes: d8a6a63372b8 ("media: qcom: iris: merge hfi_response_ops and hfi_command_ops") Assisted-by: Claude:claude-opus-4-8 Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: take core lock when scanning the instance listDmitry Baryshkov
iris_check_session_supported() walks core->instances to confirm the current instance is registered, but does so without holding core->lock. A concurrent iris_close() takes core->lock and removes a (possibly different) instance from the list via list_del_init() before freeing it, so the lockless traversal can follow a freed pointer and dereference it, resulting in a use-after-free. Hold core->lock across the list traversal, matching the other iterators over core->instances such as iris_check_core_mbpf(). The lock is dropped before iris_check_core_mbpf() is called so the nesting is unchanged. Fixes: bdbe1cac0c10 ("media: iris: add check whether the video session is supported or not") Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: fail firmware boot on invalid uc_regionDmitry Baryshkov
iris_vpu_boot_firmware() polls CTRL_STATUS while the firmware boots. When the hardware reports an invalid uc_region setting, the poll loop breaks early with count still below max_tries. The following timeout check (count >= max_tries) is therefore false, so the function skips the error return and falls through to return 0, reporting a successful boot. The caller then enables host interrupts and proceeds to use firmware that never came up, which can lead to unhandled timeouts or hardware hangs. Return an error directly from the uc_region error path instead of breaking out of the loop and reporting success. Fixes: abf5bac63f68 ("media: iris: implement the boot sequence of the firmware") Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: constify inst_fw_cap_sm8250_decDmitry Baryshkov
Mark inst_fw_cap_sm8250_dec as a const array, the data is read-only. Suggested-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: venus: skip QCM2290 if Iris driver is enabledDmitry Baryshkov
As the Iris driver now supports the QCM2290 hardware too, there is a race between Venus and Iris drivers on binding to the corresponding device. Follow the approach used by other platforms and skip QCM2290 in the Venus driver if Iris is enabled. Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: add Gen2 firmware support on the Agatti platformDikshita Agarwal
Agatti platform is using HFI Gen1 firmware, which is considered to be legacy firmware branch. Follow the example of the SC7280 platform and extend the driver with supporting both HFI Gen1 and Gen2 firmwares for this platform. Like HFI Gen1 this firmware doesn't have PIPE property (but unlike Gen1 buffer sizes are calculated on the driver side). Add the Gen2 encoder controls supported by this firmware: the Long-Term Reference control and hierarchical (layered) coding. Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Introduce buffer size calculations for AR50LTDikshita Agarwal
Introduces AR50LT buffer size calculation for both encoder and decoder. Reuse the buffer size calculation which are common, while adding the AR50LT specific ones separately. Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: implement support for the Agatti platformDmitry Baryshkov
Port support for the AR50Lt video codec core (present for example on the Agatti platform) to the Iris driver. Unlike more recent cores this generation doesn't have the PIPE property (as it always has only one pipe). Also, unlike newer platforms, buffer sizes are requested from the firmware instead of being calculated by the driver. Co-developed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: update buffer requirements based on received infoDmitry Baryshkov
Upon receiving data for HFI_PROPERTY_CONFIG_BUFFER_REQUIREMENTS the driver should update buffer sizes and counts from the received data. Implement corresponding functionality updating buffers data. This will be used for upcoming support of AR50Lt platforms with Gen1 firmware. Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: add minimal GET_PROPERTY implementationDmitry Baryshkov
AR50Lt with the Gen1 firmware requires host to read HFI_PROPERTY_CONFIG_BUFFER_REQUIREMENTS property, otherwise it doesn't update internal data and fails the HFI_CMD_SESSION_LOAD_RESOURCES command. Implement minimal support for querying the properties from the firmware. It is used by one of the following patches, adding support for Agatti. Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Add framework support for AR50_LITE video coreDikshita Agarwal
Add power sequence for ar5lt core. Add register handling for ar50lt by hooking up vpu op with ar50lt specific implemtation or resue from earlier generation wherever feasible. Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: skip PIPE if it is not supported by the platformDmitry Baryshkov
AR50Lt doesn't support HFI_PROPERTY_PARAM_WORK_ROUTE. Tables for AR50LT won't have corresponding entry in the capability tables. Let iris_set_pipe() silently skip propgramming the property if there is no corresponding capability. Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Add platform flag for instantaneous bandwidth votingDikshita Agarwal
AR50LT require explicit instantaneous bandwidth (IB) voting in addition to average bandwidth (AB) when configuring interconnect QoS. This requirement is due to QSB (Qualcomm System Bus) 128b to QNS ( Qualcomm Network Switch) 256b conversion at video noc in AR50LT which is not needed for other IRIS cores. In preparation of adding support for AR50LT core, introduce platform-configurable IB multiplier and enable IB voting for all SoCs. Existing platforms default to IB == AB, while AR50LT requires 2x peak bandwidth. Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Add platform data field for watchdog interrupt maskDikshita Agarwal
For AR50LT core, the value of WRAPPER_INTR_STATUS_A2HWD_BMASK differs from the currently supported VPUs. In preparation for adding AR50LT support in subsequent patches, introduce a platform data field, wd_intr_mask, to capture the watchdog interrupt bitmask per platform. Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: add vpu op hook to disable ARP bufferDikshita Agarwal
On AR50LT platforms AbsolutelyPerfectRouting (ARP) needs to be disabled so firmware can configure the ARP internal buffer as non-secure for encoder usage. In preparation of adding support for AR50LT platforms, add an optional disable_arp callback to the VPU ops and invoke it from core init and resume paths. No functional change for existing platforms. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Introduce interrupt_init as a vpu_opDikshita Agarwal
The interrupt_init sequence is currently shared across all supported devices. Starting with Qualcomm QCM2290 (AR50LT), the register programming would differ. Move interrupt_init into a vpu_op to allow per-device customization. This change prepares the driver for upcoming hardware variants. No functional change so far for existing devices. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Introduce set_preset_register as a vpu_opDikshita Agarwal
The set_preset_registers sequence is currently shared across all supported devices. Starting with Qualcomm QCM2290 (AR50LT), the register programming would differ. Move set_preset_register into a vpu_op to allow per-device customization. This change prepares the driver for upcoming hardware variants. No functional change so far for existing devices. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Filter UBWC raw formats based on hardware capabilitiesDikshita Agarwal
The raw formats supported by Iris were previously advertised unconditionally, assuming UBWC support on all platforms. However, some platforms do not support UBWC which results in incorrect format capability exposure. Use the UBWC configuration provided by the platform to dynamically filter raw formats at runtime. If UBWC is not supported, UBWC-based formats are omitted from the advertised capability list, while linear formats remain available. Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: drop IRIS_FMT_foo enumerationDmitry Baryshkov
The IRIS_FMT_foo defines are only used for indexing values in the format enumeration arrays. However this kind of enumeration doesn't follow the V4L2 logic (which expects an array with consequtive indexing rather than a sparse array) and complicates adding support for platforms which support different sets of formats. Drop this enumeration and use flat lists of supported formats. Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Skip UBWC configuration when not supportedDikshita Agarwal
UBWC configuration is not applicable to all SoCs. Add a check to avoid configuring UBWC during sys init on unsupported platforms. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Add Gen2 firmware autodetect and fallbackDikshita Agarwal
Some Iris platforms support both Gen1 and Gen2 HFI firmware images. Update the firmware loading logic to handle this generically by preferring Gen2 when available, while safely falling back to Gen1 when required. The firmware loading logic is updated with the following priority: 1. Device Tree (`firmware-name`): If specified, load unconditionally. 2. Gen2 default : If no DT override exists, select the Gen2 firmware descriptor when present and attempt to load the corresponding firmware image. 3. Gen1 Fallback: If loading the Gen2 firmware fails and a Gen1 descriptor is available, retry with the Gen1 firmware image. Loading and generation detection are split into two steps. iris_load_firmware() applies the priority above and returns the loaded image together with a candidate descriptor. iris_detect_firmware() then runs only after qcom_mdt_load() has succeeded and publishes the chosen descriptor, so the driver commits to a HFI generation only for an image that has actually been loaded. When a platform provides both Gen1 and Gen2 firmware descriptors and the firmware is loaded via a DT override, the candidate descriptor is only a default: iris_detect_firmware() inspects the loaded image to pick the generation, before authentication. It scans the memory populated by qcom_mdt_load() rather than the request_firmware() blob, so that a split .mdt image, whose version string lives in the .bNN data segments and not in the ELF headers, is classified correctly. The firmware is classified as Gen2 if the QC_IMAGE_VERSION_STRING starts with "vfw" or matches the "video-firmware.N.M" format with N >= 2. If a Gen1 firmware image is detected in this case, the driver switches to the Gen1 firmware descriptor and associated platform data so that the correct HFI implementation is used. This change makes firmware generation detection platform‑agnostic, preserves DT overrides, prefers newer Gen2 firmware when available, and maintains compatibility with platforms that only support Gen1. Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Co-developed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> [bod: initialised desc = NULL in iris_load_fw_to_memory] [bod: Removed dangling iris_session_init_caps() from iris_probe()] Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29Revert "media: iris: Add Gen2 firmware autodetect and fallback"Dmitry Baryshkov
The commit 412a2e5955e0 ("media: iris: Add Gen2 firmware autodetect and fallback") added support for detecting the firmware HFI interface based on the firmware contents, but it has issues with the MDT split files and with synchronisation / locking. Revert the commit, it will be replaced by the better version. Fixes: 412a2e5955e0 ("media: iris: Add Gen2 firmware autodetect and fallback") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> [bod: Fixed merge conflict adding additional v4l2_device_register();] Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Fix frame interval enumeration for non-divisor frameratesVishnu Reddy
iris_enum_frameintervals() advertised frame intervals using V4L2_FRMIVAL_TYPE_STEPWISE with step=1/MAXIMUM_FPS where MAXIMUM_FPS is 480. This caused client to enumerate only framerates of the form MAXIMUM_FPS/n (where n is a positive integer), restricting support to exact divisors of MAXIMUM_FPS (e.g., 480, 240, 160, 120, 96, 80, 60, 30, 24, 1). Framerates that are not exact divisors of MAXIMUM_FPS, such as 29 fps, 25 fps, were excluded from the enumerated list. There is no hardware restriction to framerates that are exact divisors of MAXIMUM_FPS. This caused GStreamer caps negotiation to fail with an "internal data stream error" when encoding content at such framerates. Fix this by using V4L2_FRMIVAL_TYPE_CONTINUOUS. With CONTINUOUS type, GStreamer creates a continuous framerate range [1, max_fps], allowing any integer framerate within the range to pass caps negotiation. The step field is set to 1/1 as required by the V4L2 specification for continuous frame intervals. Fixes: a6882431a138 ("media: iris: Add support for ENUM_FRAMESIZES/FRAMEINTERVALS for encoder") Cc: stable@vger.kernel.org Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Fix power-off ordering to disable power domain after clocksVishnu Reddy
In iris_vpu_power_off_hw(), iris_disable_power_domains() was called before the associated clocks (IRIS_BSE_HW_CLK, IRIS_HW_AHB_CLK, IRIS_HW_CLK) were disabled and unprepared. This reverses the correct power-down sequence: with the power domain already removed, the subsequent clk_disable_unprepare() calls end up operating on clock-controller hardware that is no longer powered, which can hang or behave unpredictably. Reorder the calls so iris_disable_power_domains() runs after all three clocks are disabled, ensuring clocks are always turned off while their power domain is still active, and mirroring the reverse of the power-on sequence. Fixes: bb8a95aa038e ("media: iris: implement power management") Cc: stable@vger.kernel.org Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Fix bus_info prefix in VIDIOC_QUERYCAPVishnu Reddy
The bus_info field returned by VIDIOC_QUERYCAP used the abbreviated prefix "plat:" instead of the standard "platform:" prefix expected for platform devices. v4l2-compliance validates that bus_info for platform devices starts with "platform:", and fails otherwise: fail: ../utils/v4l2-compliance/v4l2-compliance.cpp(671): missing bus_info prefix ('plat:aa00000.video-codec:dec') Update the format string in iris_querycap() to use "platform:" so that v4l2-compliance bus_info check passes. Fixes: 94ef75095d5e ("media: iris: Enumerate cap->bus_info to differentiate between encoder and decoder") Cc: stable@vger.kernel.org Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: cancel sys error work on driver removalHungyu Lin
Cancel sys_error_handler before tearing down the driver. The delayed work may still be pending when iris_remove() runs. Since iris_core is allocated with devm_kzalloc(), allowing the work to execute after driver removal could result in accessing freed memory. Fixes: fb583a214337 ("media: iris: introduce host firmware interface with necessary hooks") Signed-off-by: Hungyu Lin <dennylin0707@gmail.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> [bod: Fixed patch title] Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: Fix iova allocation from restrict regionVishnu Reddy
The VPU issues DMA through several SMMU streams, and the hardware does not give every stream the same addressable range. The non-pixel stream cannot address the low 600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA space, so nothing stops a non-pixel buffer from landing below 600MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots. https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Fix this by reserving the 0-600MB range, below the boundary the non-pixel stream cannot address, using dma_iova_try_alloc() so the IOMMU-DMA core never hands that range out to a real DMA mapping. This reserves only IOVA space, it does not allocate any physical memory. Since sub-nodes for non-pixel, pixel, and secure streams do not exist yet and only a single device is available, the restriction is applied to both non-pixel and pixel stream IDs. Fixes: d7378f84e94e ("media: iris: introduce iris core state management with shared queues") Cc: stable@vger.kernel.org Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: avoid bit depth validation for capture formatsVishnu Reddy
When validating a capture format, check_format() compares the requested pixel format against inst->fw_caps[BIT_DEPTH]. However, the bit depth capability is not available at this stage and it contains the default value of BIT_DEPTH_8. The actual bit depth is updated later after the firmware reports stream capabilities through read_input_subcr_params(). Because of this, a valid client request of QC10C format request is rejected during the initial format negotiation. The driver then falls back to the default capture format (NV12) and stores it as capture format. Later, when the firmware reports that the stream is 10-bit, the driver sees NV12 as the selected capture format and switches to the default 10-bit format (P010). As a result, the original QC10C format requested by userspace is lost and QC10C decoding cannot work correctly. The bit depth information is not reliable during the initial format setup, so it should not be used to validate capture formats. Remove the bit-depth checks from check_format() and only verify that the requested pixel format is supported. This allows the format requested by userspace is handled correctly. Fixes: 20c3ef4c7cae ("media: qcom: iris: vdec: update find_format to handle 8bit and 10bit formats") Cc: stable@vger.kernel.org Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: iris: reset AHB bridge before enabling HW modeVikash Garodia
When video power domain is switched from software-controlled mode to hardware-controlled mode, the core may be powered down without the AHB bridge going through the required reset sequence. This may leave the bridge FIFO in a stale state. Reset the CPU-to-VPU AHB bridge before switching the power domain to hardware-controlled mode. This ensures that the bridge FIFO are in reset state before going for mode switch. Reported-by: Birk Skyum <birk.skyum@pm.me> Link: https://lore.kernel.org/all/20260913194707.91885-1-birk.skyum@pm.me Fixes: 95a337f92f0a ("media: iris: switch to hardware mode after firmware boot") Cc: stable@vger.kernel.org Co-developed-by: Renjiang Han <renjiang.han@oss.qualcomm.com> Signed-off-by: Renjiang Han <renjiang.han@oss.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Tested-by: Birk Skyum <birk.skyum@pm.me> # Lenovo Yoga Slim 7x Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: venus: Fix iova allocation from restrict regionVishnu Reddy
The VPU issues DMA through several SMMU streams, and the hardware does not give every stream the same addressable range. The non-pixel stream cannot address the low 600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA space, so nothing stops a non-pixel buffer from landing below 600MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots. https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Fix this by reserving the 0-600MB range, below the boundary the non-pixel stream cannot address, using dma_iova_try_alloc() so the IOMMU-DMA core never hands that range out to a real DMA mapping. This reserves only IOVA space, it does not allocate any physical memory. Since sub-nodes for non-pixel, pixel, and secure streams do not exist yet and only a single device is available, the restriction is applied to both non-pixel and pixel stream IDs. Fixes: af2c3834c8ca ("[media] media: venus: adding core part and helper functions") Cc: stable@vger.kernel.org Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> [bod: took iova_state description from iris and applied to venus in core.h] Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: venus: Drop session events without an instanceRuoyu Wang
hfi_process_msg_packet() intentionally allows HFI_MSG_EVENT_NOTIFY packets without a matching session instance because HFI_EVENT_SYS_ERROR is a system event and has no session attached. That exception currently applies to every event-notify packet. If the firmware reports a late or otherwise invalid session event after to_instance() fails, hfi_event_notify() can dispatch it to session-only handlers such as event_seq_changed() or event_release_buffer_ref(), which dereference inst. Only system errors are valid without a session instance. Drop other event notifications before the session event handlers can dereference a NULL inst. This issue was found by a static analysis checker and confirmed by manual source review. Fixes: 09c2845e8fe4 ("[media] media: venus: hfi: add Host Firmware Interface (HFI)") Signed-off-by: Ruoyu Wang <ruoyuw560@gmail.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Drop csiphy_res_8300 phy resource tableHans de Goede
The qcs8300 phys are identical to the sa8775p's phys drop the duplicate info and use csiphy_res_8775p[] for the qcs8300_resources. The only difference is that the qcs8300 has 3 phys vs 4 phys for the sa8775p, so explicitly set csiphy_num to 3 rather then using ARRAY_SIZE(). Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Hans de Goede <johannes.goede@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Drop icc_res_qcs8300 resource tableHans de Goede
The icc_res_qcs8300 icc resource table is identical to the icc_res_sa8775p icc resource table and qcs8300_resources already uses the sa8775p resources for most things. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Hans de Goede <johannes.goede@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Use data-lanes starting at 1 for new CSIPHY modeBryan O'Donoghue
Introducing a dedicated CSIPHY driver community feedback was both to move to data-lanes starting at index 1 on the PHY side and also to match that indexing scheme in the CSI decoder - CSID. CSID consumes the data-lanes property to determine which CSID lanes to switch on. For indexes starting at 1 we need to amend the logic somewhere. The PHY side code normalises the input data to register level meanings so, replicate that logic on the CSID side. Introduce a simple flag to differentiate between legacy indexing @ 0 and new indexing @ 1. Existing bindings are not affected. Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Tested-by: Oleg Keri <okerixx@gmail.com> # Lenovo Yoga Slim 7x Gen 11 (Glymur) Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Add support for PHY API devicesBryan O'Donoghue
Add the ability to use a PHY pointer which interacts with the standard PHY API. In the first instance the code will try to use the new PHY interface. If no PHYs are present in the DT then the legacy method will be attempted. Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Tested-by: Oleg Keri <okerixx@gmail.com> # Lenovo Yoga Slim 7x Gen 11 (Glymur) Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Add Glymur compatibleNihal Kumar Gupta
Glymur's camera subsystem hardware is a functional subset of X1E80100. TPG, CSID, VFE, CSID wrapper and ICC resources are shared; Glymur has three CSIPHY instances versus X1E80100's four. qcom,x1e80100-camss is not used as a fallback compatible since it is already claimed by its own binding schema, causing a duplicate compatible warning in the DT schema checker. Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Report hardware version via media controllerLoic Poulain
Populate media_dev.hw_revision with the top-level CAMSS hardware version so that user space can query the exact hardware variant through the media controller (e.g. via media-ctl or MEDIA_IOC_DEVICE_INFO). This can help identify the platform variant and adapt behaviour accordingly, for example allowing libcamera to apply quirks or enable features that cannot be discovered through standard V4L2 or media-controller APIs. The version register is exposed by some platforms through the top-level "top" reg region (offset 0). When present, map it and read the version once at probe. This is a no-op on platforms not mapping the region (yet). Reported media info on Agatti/CM2290 (Spectra 520): Media Driver Info: Driver name : qcom-camss Model : Qualcomm Camera Subsystem Bus info : platform:5c11000.camss Hardware revision: 0x00050200 (328192) Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Drop top_ahb/ahb/axi from QCM2290 subdevice clocksLoic Poulain
Remove the top_ahb, ahb and axi clocks from QCM2290 subdevice clock lists. These clocks are now handled centrally as global CAMSS PM clocks and are automatically enabled when CAMSS is runtime resumed. This avoids redundant clock references in individual subdevices and ensures consistent clock management across the CAMSS pipeline. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Add PM clock definitions for QCM2290Loic Poulain
Provide the required CAMSS PM clock descriptors for the QCM2290 platform. Register the top_ahb, ahb and axi clocks so they can be managed automatically through the PM clock framework (they are part of the camss-top group). Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Add PM clock support and integrate with runtime PMLoic Poulain
Add optional PM clock support to the CAMSS driver using the PM clock framework. This allows CAMSS clocks to be registered once and automatically managed during runtime suspend and resume. This is especially useful for global CAMSS clocks that are shared across multiple CAMSS subblocks. This avoids the need for each subblock to reference and manage the shared clocks individually. A typical example is the set of clocks in the top_group, which may be used by CSID, PHY, CCI, and other CAMSS blocks. Introduce a small PM clock descriptor table in the CAMSS resources structure to describe clocks and their optional rates. Initialize these clocks at probe time and delegate clock ownership to the PM core. Hook PM clock handling into the runtime PM callbacks to ensure clocks are properly suspended and resumed alongside power domains and ICC paths. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: Add "gcc_axi_hf" to 8775p VFE lite clock listsHans de Goede
The "gcc_axi_hf" clock is correctly listed in the clock list of the 8775p 2 main VFE-s, but it is missing from all the VFE-lite clock lists, causing these to not work on platforms where the firmware allows turning off "gcc_axi_hf". Add the missing "gcc_axi_hf" to fix the VFE-lite blocks not working on these platforms. Fixes: 924f45e58b1fe ("media: qcom: camss: Add missing clocks for VFE lite on sa8775p") Cc: stable@vger.kernel.org Suggested-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Hans de Goede <johannes.goede@oss.qualcomm.com> Tested-by: Cory Keitz <ckeitz@amazon.com> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: vfe: Fix VFE reset while another line is streamingHitesh Patel
vfe_disable_output() stops the write masters of the line being disabled and then resets the whole VFE. The reset is not limited to that line. When two lines of one VFE stream at the same time, which is the case whenever a CSID demultiplexes several virtual channels to different RDIs, stopping the first line resets the VFE underneath the second line. The second line's write master configuration is wiped, the buffers it had in flight are never completed, and the VFE is left in a state in which the next global reset is not acknowledged. Stopping or restarting the second line then fails with: VFE reset timeout Move the reset to vfe_disable() and do it under stream_lock, as part of the decrement that makes the count reach zero, so that exactly one caller resets and no line can be enabled while the reset runs. Stopping the line's write masters is enough to quiesce that line on its own. With a single line streaming, the reset happens exactly as before. Fixes: 7319cdf189bb ("media: camss: Add support for VFE hardware version Titan 170") Cc: stable@vger.kernel.org Signed-off-by: Hitesh Patel <hitesh@ebytelogic.com> Suggested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> [bod: Converted vfe_disable_output to void] Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: vfe-17x: Fix write master selection for RDI linesHitesh Patel
On the gen2 VFE bus there is no crossbar between the RDI paths and the bus write masters: RDI n is served by write master n. The common vfe_get_output_v2() reflects this by mapping line->id to write master line->id, and every gen2 VFE except 17x uses it. The 17x code kept its own vfe_get_output(), which reserves whichever write master is free first. That happens to be the right one as long as a single line streams and it is RDI0. As soon as two lines of the same VFE stream, for instance two virtual channels demultiplexed by the CSID to RDI0 and RDI1, the second line to start is given the write master of the other RDI. Both write masters are then programmed with the buffer address and frame size of the wrong line. The frames are truncated to the smaller of the two buffers and the SMMU faults on the larger one. Use vfe_get_output_v2() on 17x like the other gen2 VFEs and drop the duplicate. This also removes an error path that released output->wm_idx[0] before it had been assigned. The gen1 VFEs are not affected: they have a bus crossbar and any write master can serve any line, so vfe_reserve_wm() is correct there. Fixes: 7319cdf189bb ("media: camss: Add support for VFE hardware version Titan 170") Cc: stable@vger.kernel.org Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Hitesh Patel <hitesh@ebytelogic.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-09-29media: qcom: camss: vfe-17x: Fix write master buffer done being droppedHitesh Patel
The VFE 17x interrupt handler reads and clears the bus status registers on every interrupt, but only acts on the per write master BUF_DONE bits when bit 9 of IRQ_STATUS_0 is set as well. Bit 9 is the ping-pong flag of image master 1. It has nothing to do with the other write masters, and it is not guaranteed to be set in the same interrupt in which a write master reports a completed buffer. The bus status is read-to-clear. When a buffer done arrives while bit 9 is not set, the handler clears the status and never calls wm_done() for it. The buffer stays queued in the driver and the video node never receives that frame. With one RDI streaming this is rare. With two RDIs streaming on the same VFE, for instance two virtual channels demultiplexed by the CSID, the interrupt rate doubles and one of the two lines loses buffer done events continuously. Act on the bus status alone, as the other gen2 VFE handlers do. Fixes: 7319cdf189bb ("media: camss: Add support for VFE hardware version Titan 170") Cc: stable@vger.kernel.org Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Signed-off-by: Hitesh Patel <hitesh@ebytelogic.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>