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authorOrgad Shaneh <orgads@gmail.com>2026-09-15 07:12:45 +0000
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2026-09-26 09:49:29 +0200
commit2d1d4f443975acc64d81f0ededd44864542dbd08 (patch)
tree52794d4d2748fa6644793210e0e0a806afd90e12 /scripts/Makefile.thinlto
parent9a486d67423ea2f95d1f1b085a981f8c33c45452 (diff)
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MIPS: OCTEON: cvmx-l2c: add the CN66XX L2 geometry
cvmx_l2c_get_set_bits() and cvmx_l2c_get_num_assoc() know the CN63XX as the only OCTEON II part, so on a CN6635 both fell through to their "Unsupported OCTEON Model" defaults: 2048 sets, and 8 ways which the CN3XXX/CN5XXX fuse path - a read of L2D_FUS3, which is not a register on OCTEON II - then shifted down to 2. The CN66XX L2 has the CN63XX geometry, 16 ways and 1024 sets, and reports its fused-off ways in MIO_FUS_DAT3[l2c_crip] like the rest of OCTEON II, so name it in those three branches. With this the board reports assoc 16, sets 1024, and cvmx_l2c_lock_line() computes the tag alias from the right associativity. The CN68XX and CN61XX are deliberately left alone: their L2 geometry differs from the CN63XX, and the CN68XX also uses bit <2> of MIO_FUS_DAT3[l2c_crip], which the decoding here does not handle. I have no such board to test on. Assisted-by: Claude:claude-opus-5 Signed-off-by: Orgad Shaneh <orgads@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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