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Add a driver for the USB3.2 PHY on the Aspeed AST2700, which is paired
with the DWC3 controller.
The PHY draws its configuration from an internal SRAM in both of the
available modes, so the driver must wait for PHY3S00_INIT_DONE before
selecting one. PHY3S00_SRAM_BYPASS selects the default design
configuration and PHY3S00_SRAM_EXT_LOAD the ROM code configuration; the
driver uses the latter.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https://patch.msgid.link/20260916-upstream_usb3phy-v4-2-812e76037d01@aspeedtech.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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