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| author | Mark Brown <broonie@kernel.org> | 2026-07-26 21:51:45 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-07-26 21:51:45 +0100 |
| commit | c8a16cdf482ecaaa6c17bbcf1ea922dfffe46faf (patch) | |
| tree | 349b4637519ab6617d751c61243b6793c0d99f3e /Documentation/devicetree/bindings | |
| parent | d49fd9a7e305bcf102c21dd17ce8f9746a03962f (diff) | |
| parent | 2df26b8663b6f315d0e9364927c8503280fe3dd3 (diff) | |
| download | linux-next-c8a16cdf482ecaaa6c17bbcf1ea922dfffe46faf.tar.gz linux-next-c8a16cdf482ecaaa6c17bbcf1ea922dfffe46faf.zip | |
Merge branch 'renesas-clk' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml | 6 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml index f261445bf341..dd3e66a4559b 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzv2h-cpg.yaml @@ -26,16 +26,22 @@ properties: maxItems: 1 clocks: + minItems: 3 items: - description: AUDIO_EXTAL clock input - description: RTXIN clock input - description: QEXTAL clock input + - description: AUDIO_CLKB clock input + - description: AUDIO_CLKC clock input clock-names: + minItems: 3 items: - const: audio_extal - const: rtxin - const: qextal + - const: audio_clkb + - const: audio_clkc '#clock-cells': description: | diff --git a/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml b/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml index b339f1f9f072..990d287d0a90 100644 --- a/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas Versaclock7 Programmable Clock maintainers: - - Alex Helms <alexander.helms.jy@renesas.com> + - Biju Das <biju.das.jz@bp.renesas.com> description: | Renesas Versaclock7 is a family of configurable clock generator and |