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authorMiquel Raynal <miquel.raynal@bootlin.com>2026-03-18 11:47:50 +0100
committerMiquel Raynal <miquel.raynal@bootlin.com>2026-03-25 15:27:46 +0100
commit25a915fad503c2678902075565d47ddc2aa45db9 (patch)
tree95e92cae2664801c66503fb6fb1b5304762befd6 /tools/perf/scripts/python
parent54dcd6aa69db541529a083b31f106ef7d147fea1 (diff)
downloadlwn-25a915fad503c2678902075565d47ddc2aa45db9.tar.gz
lwn-25a915fad503c2678902075565d47ddc2aa45db9.zip
mtd: spinand: winbond: Clarify when to enable the HS bit
Above 104MHz when in fast dual or quad I/O reads, the delay between address and data cycles is too short. It is possible to reach higher frequencies, up to 166MHz, by adding a few more dummy cycles through the setting of the HS bit. Improve the condition for enabling this bit, and also make sure we set it at soon as we go over 104MHz. Fixes: f1a91175faaa ("mtd: spinand: winbond: Enable high-speed modes on w25n0xjw") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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