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| author | Richard Genoud <richard.genoud@bootlin.com> | 2026-03-17 15:24:37 +0100 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2026-03-25 15:27:30 +0100 |
| commit | 54dcd6aa69db541529a083b31f106ef7d147fea1 (patch) | |
| tree | e7472f16ac77cecac6dfdc80e095684c7fc613da /tools/perf/scripts/python | |
| parent | a22f40d9eb1ef587a8201fde3f004173fd8b5e8e (diff) | |
| download | lwn-54dcd6aa69db541529a083b31f106ef7d147fea1.tar.gz lwn-54dcd6aa69db541529a083b31f106ef7d147fea1.zip | |
mtd: rawnand: sunxi: introduce maximize variable user data length
In Allwinner SoCs, user data can be added in OOB before each ECC data.
For older SoCs like A10, the user data size was the size of a register
(4 bytes) and was mandatory before each ECC step.
So, the A10 OOB Layout is:
[4Bytes USER_DATA_STEP0] [ECC_STEP0 bytes]
[4bytes USER_DATA_STEP1] [ECC_STEP1 bytes]
...
NB: the BBM is stored at the beginning of the USER_DATA_STEP0.
Now, for H6/H616 NAND flash controller, this user data can have a
different size for each step.
So, we are maximizing the user data length to use as many OOB bytes as
possible.
Fixes: 88fd4e4deae8 ("mtd: rawnand: sunxi: Add support for H616 nand controller")
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
