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| author | Animesh Manna <animesh.manna@intel.com> | 2019-09-20 17:29:24 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2019-09-23 10:09:46 +0300 |
| commit | b27a96ad72fd706adc5dbbfd7bba76f698fe3875 (patch) | |
| tree | 3a22c710447912f983ea0f32aadbcd39bfcb4604 /drivers/gpu/drm/i915/display/intel_dsb.h | |
| parent | 061489c65ff57ee9f757d7a519fb9a09e5fbadd6 (diff) | |
| download | lwn-b27a96ad72fd706adc5dbbfd7bba76f698fe3875.tar.gz lwn-b27a96ad72fd706adc5dbbfd7bba76f698fe3875.zip | |
drm/i915/dsb: Indexed register write function for DSB.
DSB can program large set of data through indexed register write
(opcode 0x9) in one shot. DSB feature can be used for bulk register
programming e.g. gamma lut programming, HDR meta data programming.
v1: initial version.
v2: simplified code by using ALIGN(). (Chris)
v3: ascii table added as code comment. (Shashank)
v4: cosmetic changes done. (Shashank)
v5: reset ins_start_offset. (Jani)
v6: update ins_start_offset in inel_dsb_reg_write.
Cc: Shashank Sharma <shashank.sharma@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920115930.27829-5-animesh.manna@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dsb.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h index 839cbf621fa2..e4dd0ab799ec 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.h +++ b/drivers/gpu/drm/i915/display/intel_dsb.h @@ -32,11 +32,20 @@ struct intel_dsb { * and help in calculating tail of command buffer. */ int free_pos; + + /* + * ins_start_offset will help to store start address of the dsb + * instuction and help in identifying the batch of auto-increment + * register. + */ + u32 ins_start_offset; }; struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc); void intel_dsb_put(struct intel_dsb *dsb); void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); +void intel_dsb_indexed_reg_write(struct intel_dsb *dsb, i915_reg_t reg, + u32 val); #endif |