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| author | Jani Nikula <jani.nikula@intel.com> | 2019-09-23 10:09:23 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2019-09-23 10:09:23 +0300 |
| commit | 061489c65ff57ee9f757d7a519fb9a09e5fbadd6 (patch) | |
| tree | 450d108d154a59614ccf59a9d10af54cb14fff4d /drivers/gpu/drm/i915/display/intel_dsb.h | |
| parent | 67f3b58f3bac975f35c312fd8876edb599cc24be (diff) | |
| download | lwn-061489c65ff57ee9f757d7a519fb9a09e5fbadd6.tar.gz lwn-061489c65ff57ee9f757d7a519fb9a09e5fbadd6.zip | |
drm/i915/dsb: single register write function for DSB.
DSB support single register write through opcode 0x1. Generic
api created which accumulate all single register write in a batch
buffer and once DSB is triggered, it will program all the registers
at the same time.
v1: Initial version.
v2: Unused macro removed and cosmetic changes done. (Shashank)
v3: set free_pos to zero in dsb-put() instead dsb-get() and
a cosmetic change. (Shashank)
v4: macro of indexed-write is moved. (Shashank)
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920115930.27829-4-animesh.manna@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dsb.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h index b8639864df50..839cbf621fa2 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.h +++ b/drivers/gpu/drm/i915/display/intel_dsb.h @@ -8,6 +8,8 @@ #include <linux/types.h> +#include "i915_reg.h" + struct intel_crtc; struct i915_vma; @@ -24,10 +26,17 @@ struct intel_dsb { enum dsb_id id; u32 *cmd_buf; struct i915_vma *vma; + + /* + * free_pos will point the first free entry position + * and help in calculating tail of command buffer. + */ + int free_pos; }; struct intel_dsb * intel_dsb_get(struct intel_crtc *crtc); void intel_dsb_put(struct intel_dsb *dsb); +void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); #endif |