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authorChanghwan Youn <chaos.youn@samsung.com>2011-07-16 10:49:51 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-07-20 23:28:28 +0900
commitaab74d3e753649defa52ea43cbec1e91ebb4cc8e (patch)
tree452f0015f1a78897a8a22ee43ebdc7a8f576c55d /arch/arm/mach-exynos4/cpu.c
parente807acbc6fd1d5ff115f9a8eae0c1af6cf1c46c6 (diff)
downloadlwn-aab74d3e753649defa52ea43cbec1e91ebb4cc8e.tar.gz
lwn-aab74d3e753649defa52ea43cbec1e91ebb4cc8e.zip
ARM: EXYNOS4: Add support external GIC
For full support of power modes, this patch adds implementation external GIC on EXYNOS4. External GIC of Exynos4 cannot support register banking so several interrupt related code for CPU1 should be different from that of CPU0. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/cpu.c')
-rw-r--r--arch/arm/mach-exynos4/cpu.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 1aaad56ca7e7..7dccf4ab11ff 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -16,6 +16,7 @@
#include <asm/proc-fns.h>
#include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/gic.h>
#include <plat/cpu.h>
#include <plat/clock.h>
@@ -160,11 +161,20 @@ void __init exynos4_init_clocks(int xtal)
exynos4_setup_clocks();
}
+static void exynos4_gic_irq_eoi(struct irq_data *d)
+{
+ struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
+
+ gic_data->cpu_base = S5P_VA_GIC_CPU +
+ (EXYNOS4_GIC_BANK_OFFSET * smp_processor_id());
+}
+
void __init exynos4_init_irq(void)
{
int irq;
gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+ gic_arch_extn.irq_eoi = exynos4_gic_irq_eoi;
for (irq = 0; irq < MAX_COMBINER_NR; irq++) {