From aab74d3e753649defa52ea43cbec1e91ebb4cc8e Mon Sep 17 00:00:00 2001 From: Changhwan Youn Date: Sat, 16 Jul 2011 10:49:51 +0900 Subject: ARM: EXYNOS4: Add support external GIC For full support of power modes, this patch adds implementation external GIC on EXYNOS4. External GIC of Exynos4 cannot support register banking so several interrupt related code for CPU1 should be different from that of CPU0. Signed-off-by: Changhwan Youn Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos4/cpu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/mach-exynos4/cpu.c') diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c index 1aaad56ca7e7..7dccf4ab11ff 100644 --- a/arch/arm/mach-exynos4/cpu.c +++ b/arch/arm/mach-exynos4/cpu.c @@ -16,6 +16,7 @@ #include #include +#include #include #include @@ -160,11 +161,20 @@ void __init exynos4_init_clocks(int xtal) exynos4_setup_clocks(); } +static void exynos4_gic_irq_eoi(struct irq_data *d) +{ + struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); + + gic_data->cpu_base = S5P_VA_GIC_CPU + + (EXYNOS4_GIC_BANK_OFFSET * smp_processor_id()); +} + void __init exynos4_init_irq(void) { int irq; gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); + gic_arch_extn.irq_eoi = exynos4_gic_irq_eoi; for (irq = 0; irq < MAX_COMBINER_NR; irq++) { -- cgit v1.2.3