blob: 20ef2ea673f3b47eff21b89aed9c437a0e1b0f74 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
|
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H
#define _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H
/* LPASS_AUDIO_CC clocks */
#define LPASS_AUDIO_CC_PLL 0
#define LPASS_AUDIO_CC_PLL_OUT_AUX2 1
#define LPASS_AUDIO_CC_PLL_OUT_AUX2_DIV_CLK_SRC 2
#define LPASS_AUDIO_CC_PLL_OUT_MAIN_DIV_CLK_SRC 3
#define LPASS_AUDIO_CC_CDIV_RX_MCLK_DIV_CLK_SRC 4
#define LPASS_AUDIO_CC_CODEC_MEM0_CLK 5
#define LPASS_AUDIO_CC_CODEC_MEM1_CLK 6
#define LPASS_AUDIO_CC_CODEC_MEM2_CLK 7
#define LPASS_AUDIO_CC_CODEC_MEM_CLK 8
#define LPASS_AUDIO_CC_EXT_MCLK0_CLK 9
#define LPASS_AUDIO_CC_EXT_MCLK0_CLK_SRC 10
#define LPASS_AUDIO_CC_EXT_MCLK1_CLK 11
#define LPASS_AUDIO_CC_EXT_MCLK1_CLK_SRC 12
#define LPASS_AUDIO_CC_RX_MCLK_2X_CLK 13
#define LPASS_AUDIO_CC_RX_MCLK_CLK 14
#define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC 15
/* LPASS_AON_CC clocks */
#define LPASS_AON_CC_PLL 0
#define LPASS_AON_CC_PLL_OUT_EVEN 1
#define LPASS_AON_CC_PLL_OUT_MAIN_CDIV_DIV_CLK_SRC 2
#define LPASS_AON_CC_PLL_OUT_ODD 3
#define LPASS_AON_CC_AUDIO_HM_H_CLK 4
#define LPASS_AON_CC_CDIV_TX_MCLK_DIV_CLK_SRC 5
#define LPASS_AON_CC_MAIN_RCG_CLK_SRC 6
#define LPASS_AON_CC_TX_MCLK_2X_CLK 7
#define LPASS_AON_CC_TX_MCLK_CLK 8
#define LPASS_AON_CC_TX_MCLK_RCG_CLK_SRC 9
#define LPASS_AON_CC_VA_MEM0_CLK 10
/* LPASS_AON_CC power domains */
#define LPASS_AON_CC_LPASS_AUDIO_HM_GDSC 0
#endif
|
