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// SPDX-License-Identifier: ISC
/*
* Device Tree file for the Intel IXDP425 also known as IXCDP1100 Control Plane
* processor reference design.
*
* This platform has the codename "Richfield".
*
* This machine is based on a 533 MHz IXP425.
*/
/dts-v1/;
#include "intel-ixp42x.dtsi"
#include "intel-ixp4xx-reference-design.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Intel IXDP425/IXCDP1100 Richfield Reference Design";
compatible = "intel,ixdp425", "intel,ixp42x";
#address-cells = <1>;
#size-cells = <1>;
soc {
bus@c4000000 {
flash@0,0 {
compatible = "intel,ixp4xx-flash", "cfi-flash";
bank-width = <2>;
/* Enable writes on the expansion bus */
intel,ixp4xx-eb-write-enable = <1>;
/* 16 MB of Flash mapped in at CS0 */
reg = <0 0x00000000 0x1000000>;
partitions {
compatible = "redboot-fis";
/* Eraseblock at 0x0fe0000 */
fis-index-block = <0x7f>;
};
};
};
/* EthB */
ethernet@c8009000 {
status = "ok";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
};
/* EthC */
ethernet@c800a000 {
status = "ok";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";
phy-handle = <&phy1>;
};
};
};
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