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path: root/drivers/gpu/drm/i915/display/intel_lt_phy.c
AgeCommit message (Expand)Author
2026-03-24drm/i915/lt_phy: Enable dpll framework for xe3plpdMika Kahola
2026-03-24drm/i915/lt_phy: Remove LT PHY specific state verificationMika Kahola
2026-03-24drm/i915/lt_phy: Add xe3plpd Thunderbolt PLL hooksMika Kahola
2026-03-24drm/i915/lt_phy: Readout lane countMika Kahola
2026-03-24drm/i915/lt_phy: Dump lane count for HW stateMika Kahola
2026-03-24drm/i915/lt_phy: Add .enable_clock hook on DDIMika Kahola
2026-03-24drm/i915/lt_phy: Add xe3plpd .get_hw_state hookMika Kahola
2026-03-24drm/i915/lt_phy: Add xe3plpd .dump_hw_state hookMika Kahola
2026-03-24drm/i915/lt_phy: Add xe3plpd .compute_dplls hookMika Kahola
2026-03-24drm/i915/lt_phy: Add lane_count to PLL stateMika Kahola
2026-03-24drm/i915/lt_phy: Refactor LT PHY PLL handling to use explicit PLL stateMika Kahola
2026-03-24drm/i915/lt_phy: Add check if PLL is enabledMika Kahola
2026-03-24drm/i915/lt_phy: Dump missing PLL state parametersMika Kahola
2026-02-12drm/{i915, xe}: Remove i915_reg.h from displayUma Shankar
2026-02-05drm/i915/ltphy: Return true for TBT scenario during lt_phy_state compareSuraj Kandpal
2026-01-27drm/i915/cx0: Rename intel_clear_response_ready flagSuraj Kandpal
2026-01-20drm/i915/display: Remove .clock member from eDP/DP/HDMI pll tablesMika Kahola
2026-01-20drm/i915/lt_phy: Drop 27.2 MHz rateMika Kahola
2026-01-20drm/i915/lt_phy: Add verification for lt phy pll dividersMika Kahola
2026-01-20drm/i915/display: Add helper function for fuzzy clock checkMika Kahola
2026-01-20drm/i915/lt_phy: Create macro for LT PHY PLL stateMika Kahola
2026-01-20drm/i915/lt_phy: Drop LT PHY crtc_state for port calculationMika Kahola
2026-01-05drm/i915/ltphy: Provide protection against unsupported modesSuraj Kandpal
2026-01-05drm/i915/ltphy: Compare only certain fields in state verify functionSuraj Kandpal
2026-01-05drm/i915/ltphy: Remove state verification for LT PHY fieldsSuraj Kandpal
2025-12-01drm/i915/power: convert intel_wakeref_t to struct ref_tracker *Jani Nikula
2025-11-19drm/i915/cx0: Add MTL+ .enable_clock/.disable clock hooks on DDIMika Kahola
2025-11-13drm/i915/ltphy: include intel_display_utils.h instead of i915_utils.hJani Nikula
2025-11-11drm/i915/de: Use intel_de_wait_for_{set,clear}_ms()Ville Syrjälä
2025-11-11drm/i915/de: Use intel_de_wait_for_{set,clear}_us()Ville Syrjälä
2025-11-11drm/i915/de: Use intel_de_wait_ms() for the obvious casesVille Syrjälä
2025-11-11drm/i915/de: Use intel_de_wait_us()Ville Syrjälä
2025-11-11drm/i915/de: Include units in intel_de_wait*() function namesVille Syrjälä
2025-11-10drm/i915/ltphy: Return lowest portclock for HDMI from reverse algorithmSuraj Kandpal
2025-11-10drm/i915/ltphy: Implement HDMI Algo for Pll stateSuraj Kandpal
2025-11-07drm/i915/ltphy: Nuke bogus weird timeoutsVille Syrjälä
2025-11-07drm/i915/cx0: s/XELPDP_MSGBUS_TIMEOUT_SLOW/XELPDP_MSGBUS_TIMEOUT_MS/Ville Syrjälä
2025-11-07drm/i915/ltphy: Nuke extraneous timeout debugsVille Syrjälä
2025-11-01drm/i915/ltphy: Modify the step that need to be skippedSuraj Kandpal
2025-11-01drm/i915/ltphy: Define LT PHY PLL state verify functionSuraj Kandpal
2025-11-01drm/i915/ltphy: Define function to readout LT Phy PLL stateSuraj Kandpal
2025-11-01drm/i915/ltphy: Define the LT Phy state compare functionSuraj Kandpal
2025-11-01drm/i915/ltphy: Enable/Disable Tx after Non TBT Enable sequenceSuraj Kandpal
2025-11-01drm/i915/ltphy: Program LT Phy Voltage SwingSuraj Kandpal
2025-11-01drm/i915/ltphy: Hook up LT Phy Enable & Disable sequencesSuraj Kandpal
2025-11-01drm/i915/ltphy: Program LT Phy Non-TBT PLL disable sequenceSuraj Kandpal
2025-11-01drm/i915/ltphy: Program the rest of the LT Phy Enable sequenceSuraj Kandpal
2025-11-01drm/i915/ltphy: Program the rest of the PORT_CLOCK_CTL stepsSuraj Kandpal
2025-11-01drm/i915/ltphy: Program the P2P Transaction flow for LT PhySuraj Kandpal
2025-11-01drm/i915/ltphy: Add function to calculate LT PHY port clockSuraj Kandpal