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25 hoursMerge tag 'drm-next-2026-10-31' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds
Pull drm fixes from Dave Airlie: "The final set of merge window fixes, from AMD mostly. with one set of panthor mmu fixes. amdgpu: - UALink fixes - Runtime PM fixes - GPUVM fixes - Mac fixes - HDMI fixes - DP MST fix - Userptr fix - SMU fixes - DSC fix - VCE/UVD sched teardown fix - Display runpm reference fix - Display TD-LUT fix - SMU 13.x fixes - SMU 14.x fixes - Gang submit fix - Passive DVI sink fix - USB4 tunnel fix - Freesync fix amdkfd: - SVM fixes - Fix doorbell allocation race - GC 12.1 fix - GPU reset fix - Buffer accounting fixes - Bounds checking fixes - Hotplug fixes - SVM fixes - CRIU fixes - GFX12 fix panthor: - Fix bugs in MMU handling" * tag 'drm-next-2026-10-31' of https://gitlab.freedesktop.org/drm/kernel: (52 commits) drm/amd/display: refresh cached HDMI FreeSync state drm/amd/display: Cap DSC bpp for USB4 DP tunnels drm/amd/display: Poll passive DVI sinks for EDID readiness drm/amdgpu: re-enable GFXOFF for compute on GFX12 drm/amdkfd: evict the queues only once for CRIU PROCESS_INFO drm/amdgpu: drop the gang leader reference when freeing gang jobs drm/amdkfd: send SMI process and VM fault events only to allowed clients drm/amdkfd: validate SRAT subtables before parsing drm/amd/pm: preserve committed OD features for SMU 14.0.2 drm/amd/pm: add zero fan stop temperature support on smu 14.0.2 drm/amd/pm: preserve committed OD features for SMU 13.0.0/13.0.7 drm/amd/display: Initialize missing TD-LUT programming inputs drm/amdkfd: split vram_pages of SVM ranges prefetched without a GPU mapping drm/amdgpu: reject CS chunks too large for kvmalloc() drm/amd/display: take a runtime PM reference only when a CRTC turns on drm/amdgpu: guard VCE/UVD sched entity teardown on failed probe drm/amdkfd: stop restore retries on device unplug drm/amdkfd: tear down KFD processes before early fini_sw on disconnect drm/amdkfd: Validate the control stack of a restored queue drm/amdkfd: correct vram_available calculation ...
4 daysdrm/amd/display: refresh cached HDMI FreeSync stateFangzhi Zuo
When an HDMI sink re-reports an EDID without an AMD VSDB, get_amd_vsdb() returns false but the connector's cached vsdb_info was previously updated only on success. A previous FreeSync-capable EDID could therefore leave freesync_supported set and keep selecting the FreeSync SPD path instead of the HDMI VRR VTEM path. Refresh the cached VSDB record for every HDMI EDID update so a missing AMD VSDB clears stale FreeSync state. Keep the existing SPD/VTEM packet separation and protocol-selection logic unchanged. Fixes: 123e9515f7e0 ("drm/amd/display: Send HDMI VRR metadata in VTEM info packet slot") Reviewed-by: IVAN LIPSKI <ivan.lipski@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: PeiHsin Yang <peihsiny@valvesoftware.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 732a165000944e618ed38769922daf11b0fe35eb) Cc: stable@vger.kernel.org
4 daysdrm/amd/display: Cap DSC bpp for USB4 DP tunnelsFangzhi Zuo
On pre-DCN4.2 platforms, USB4 DP bandwidth allocation is unavailable. SST and MST streams are sized against their native DP link bandwidth even when multiple DP tunnels share the host router. A high-bandwidth DSC stream can consume too much shared tunnel capacity and cause intermittent display corruption when another tunnel is active. Cap the DSC target at 8 bpp for USB4 DPIA SST and MST streams when bandwidth allocation is unavailable. For MST, cap the DSC fairness range while preserving its per-link allocation. When bandwidth allocation is enabled on DCN4.2, retain forced DSC and the existing minimum-bpp behavior required to fit the tunnel grant. This is a follow-up to commit c30b9813bce1 ("drm/amd/display: Force DSC to 8bpp for SST DP tunneling over USB4") and commit cd53dcd2a7d7 ("drm/amd/display: Force DSC to 8bpp for MST DP tunneling over USB4"). Reviewed-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit e2bd5d908a89252ad4ee11a3dbc9fd57c257accd)
4 daysdrm/amd/display: Poll passive DVI sinks for EDID readinessFangzhi Zuo
A passive DP-DVI adapter is identified when the adapter DDC probe does not respond, but the downstream monitor's EDID EEPROM may still need time to become available after resume. Poll the downstream DDC address for passive DP-DVI links before reading and parsing the EDID. Keep the eDP detection optimization without adding a generic EDID retry delay or a deferred connector reprobe. Revert commit 3001d2073d65 ("drm/amd/display: Exit IPS before connector detection on resume") and rely on targeted passive DP-DVI EDID readiness polling instead of the generic pre-detection IPS exit. Fixes: d1d51519bc3b ("drm/amd/display: Skip eDP detection when no sink") Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Karthikeyan B <karthikeyan.b@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 8297e1c724733fc59027b717df73680eaf03dd56) Cc: stable@vger.kernel.org
4 daysdrm/amd/display: Initialize missing TD-LUT programming inputsAvi Weiss
dml_core_mode_programming() memsets (clears) its scratch structure before calculating TD-LUT settings, but does not initialize tdlut_mpc_width_flag or is_gfx11. Both inputs therefore remain false regardless of the plane configuration which can result in incorrect calculations. Initialize both fields using the same sources as the mode support path (now both paths are aligned). Fixes: 70839da63605 ("drm/amd/display: Add new DCN401 sources") Signed-off-by: Avi Weiss <thnkslprpt@gmail.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit ad8d216e7d9fc050cdf39278e5fae17f61c36931) Cc: stable@vger.kernel.org
4 daysdrm/amd/display: take a runtime PM reference only when a CRTC turns onLuigi Lauro
amdgpu_dm_commit_streams() takes a runtime PM reference for every active CRTC that needs a modeset and has a new stream, but amdgpu_dm_atomic_commit_tail() drops one only for each CRTC that goes from active to inactive. A modeset of a CRTC that is already active (a mode change, or anything else that needs a full modeset) therefore leaks one reference. Once that has happened, the usage count no longer returns to zero with every CRTC off, and the device cannot runtime suspend again until reboot. The two also disagree the other way when a CRTC turns on without a stream ("Failed to create new stream"): no reference is taken, but one is dropped when it turns off. Take the reference in the loop that counts the disabled CRTCs, on the mirror condition: when the CRTC goes from inactive to active, which is what the commit that added it intended ("every time we enable a previously disabled CRTC"). Each active CRTC then holds exactly one reference. Tested on an RX 9070 XT (Navi 48) over OCuLink, with the change backported to 7.2.9: an unplugged connector forced on, then mode A on a CRTC, mode B on the same active CRTC, and the CRTC off, three rounds in a row. The usage count rose by 3 with the stock module, by 0 with this patch, and by 3 again after reloading the stock module. Fixes: 97028037a38a ("drm/amdgpu: Grab/put runtime PM references in atomic_commit_tail()") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/5951 Assisted-by: Claude:claude-opus-5-5 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Luigi Lauro <luigi.lauro@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 59ef9a435499777b8e1c4e0eff52f813c64fb920) Cc: stable@vger.kernel.org
8 daysMerge tag 'drm-next-2026-10-21' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds
Pull drm updates from Dave Airlie: "Highlights: - core: a lot of atomic refactoring in progress, panic got split into a core/helpers model - amdgpu: enables HDMI 2.1 FRL and other good things finally, UAlink over Ethernet support - xe: has a bunch of CRI support, ras error for bad vram, memory offlining support. - msm: enables a bunch more GPUs. Otherwise it's a the usual mountain of stuff all over the place. Details: rust: - I/O tree shared with driver-core - DMA tree shared with driver-core - allow aux registration data closures to return covariant sub-fields - Implement Send and Sync for MapleTree - add pci resource flags and IORESOURCE_MEM_64 drm/rust: - add dma_fence abstraction - init DRM registrations and their data in place - drop unused flags argument to registration vgaarb: - rework API to pass a private ptr instead of pci device sound: - adapt to omapdrm changes gem: - add callback for handle count going to 0 gpusvm: - share one HMM fault and keep single mappings inline pagemap: - Prevent CPU stalls during unbounded pagemap teardown dma-fence: - fix docs vga_switcheroo: - disconnect from fbcon - update fbcon from within fbdev emulation atomic: - move DRM from state reset callbacks to atomic_create_state - remove drm_simple_encoder_init panic: - split into core and helpers buddy: - improve dirty tracking clients: - improve vmap handling - fbdev: Move helpers from drm_kms_helper.ko to drm_client_lib.ko display: - export HDMI SCDC status data via debugfs - rework SCDC for better HDMI 2.0 support - dp/mst: improve DPCD compliance edid: - parse AMD VSDB - parse ALLM/VRR capabilities - support detecting panel size log: - add drm_warn_ratelimited sched: - cleanup interface - add missing locking - fix run-queue cleanup - fix locking sysfb: - remove obsolete quirk for Lenovo D330 - fix panel orientation for non-native display modes - drop drm_class_device_register colorop: - provide DRM_COLOR_OP_FIXED_MATRIX bridge: - analogix: Support eDP lane mapping - ti-sn65dsi83: Support LVDS Channel B on SN65DSI84 - Select DRM_PANEL_BRIDGE for various drivers that require it - add chrontel ch7218a support panel: - panel-edp: Support MNE007QS3-F, TM140VDXP15, and KD116N36-30NB-A001 - samsung-s6d16d0: Use mipi_dsi_*_multi() functions - support Ilitek ILI7836A OLED plus DT bindings - support Novatek NT36532 plus DT bindings - convert several drivers to managed cleanup - fix Kconfig selections - edp: - Add support for BOE NV140FHM-T0A - Support CSOT MNE007QB1-1 - NV140WU2-M70 - ebbg-ft8719: Fix MODULE_LICENSE() string; Improve initialization - samsung: Share test-key helpers - ilitek-ili9882t: Support Ilitek IL79600A plus DT bindings - simple: Support Truly TFT320240-229-E plus DT bindings; Support BOE DV215FHM-R01 plus DT bindings - Refactor struct drm_panel to contain struct drm_bridge plus fallout in various panel drivers - Add support for BOE Novatek NT51021, Retroid Pocket 6, Raydium RM69220 DDIC panels, Sharp LQ138P1JX61 eDP, BOE NV140FHD-N43, AUO B140HAN04.0, AUO 0x0db3, panels. amdgpu: - use AMD VSDB for freesync - implement YUV-to-RGB with fixed-matrix colorop - enable FRL for HDMI - HDMI 2.1 freesync support - HDMI 2.1 ALLM support - HDMI 2.1 VRR support - UALoE (UALink over Ethernet) support - add syncobj_points to userq signal ioctl - drop unused kunit tests - NBIO/GC/MMHUB/SMU updates/fixes - GPU spatial partitioning updates - display kunit fixes - userq fixes - RGB quantization fixes - DC RMCM refactor - DP MST fixes - USB4 fixes - add new trace events - Rework display instance handling - stack frame size fixes for various compilers/configs - VCN 4/5 reset fixes - freesync updates - cursor refactor - Fix direct scanout alpha on some DRM_FORMATs - Expand Mac reserved memory workaround - Make runtime pm more fine grained amdkfd: - updates and fixes - GC 10 CU occupancy support radeon: - eDP fix for DCE3.2 iMacs xe: - add drm_ras netlink error event support - add memory page offlining support - introduce error threshold to drm_ras - fix stale GTT mappings on unmap - reject page faults for non-page fault mode scratch VM - enable CRI package and VRAM temperatures - introduce cold reset recovery - handle CRI+ power interval encoding - VF migration for multi-queue - handle exec queue teardown after hot unplug - alerts and controller enabling modifications - use IBCv3 on PTL - VRAM health check - report GT TDR and VM rebind faults using SIGID - add multi_queue_active_lrca debugfs - shrinker: Runtime PM reference for non-system memory - guc: Add simple KLV decoder helpers - debugfs: Expose per-engine idle status - Keep walking on SVM eviction failure - Nuke PTs only after unlinking contested VMAs - limit sg segment size to PAGE_SIZE on Xen PV - keep VF LMEM bar size low if no VFs - CPU binds and ULLS on migration queue - New PTL PCI ID - Enable PXP for NVL-S - Do not dma_fence_put zero fences in err_out path - Refresh TTM LRU on SVM prefetch - export device UID in sysfs i915: - rename GEN6_PCODE_DATA to match spec - fix incorrect RCU teardown order - fix potential UAF in command parsing - avoid WARN splat during RPS boosting race - use simpler min functions - Fixes to make i915 work well with PREEMPT_RT i915/display: - Enable CMRR (Content Match Refresh Rate) in fixed-RR VRR path - Switch DG2 MPLL to DPLL framework - DP-HDMI PCON DSC fixes - limit invalid joiner combinations - CDCLK related fixes and refactor around PCODE integration - Gate UHBR SST SDP splitting on sink caps - add HDMI TMDS audio bandwidth check - vswing/preemph override - enable AS SDP Skip frames - Handle negative configuration index on DP link caps for robustness - Preparation for enabling SDR plane color pipeline - An eDP quirk for HP Pavilion Plus - Introduce PME (Power Management Event) support on display hotplug - Handle VSC SDP revision 7 in unpack msm: - CI: - Dropped sc7180 trogdor lazor from the CI - Core: - Fixed msm_ioremap for resources without a name - Changed msm.separate_gpu_kms to default to auto selection - GPU: - Enable CLX (Current Limit eXtension) for gen8 to avoid exceeding limits on CX/GX rails - New GPUs: a830 (Pakala), a845 (Maili), a850 (Hawi), x2-85 (Mahua) - Fix VBIF halt mask on a306, which was preventing runpm suspend - Enable THP support for GEM buffers - Add modparam to disable waiting on fences in shrinker - Drop use of drm_prime_sg_to_page_array() - a5xx: don't read the GPMU registers on GPUs without a GPMU - a2xx/a3xx/a5xx: hangcheck progress detection - a6xx: gmuwrapper runpm fix - Calculate reported GMEM size based on active slices - Split a6xx/a7xx/a8xx catalog - DP: - Picked up some preparation patches for the MST support - Fixed reported status of the link training - DPU: - Fixed CRTC bandwidth computation - Fixed DSC programming - Fixed encoder disablement path - DSI: - Fixed VM leak in error path - Indention fix - MDP5: - Added MSM8952 configuration - Dropped incorrect cursor pipe on MSM8976/56 - HDMI: - Small fixes nouveau: - improve runtime PM on R570 GSP firmware - various fixes throughout the driver - dispnv50: support 2.147 GHz pixel clock in GB20x nova: - add initial uapi concept - add initial PRAMIN access support - add GpuMm centralized memory manager - add GPU VM and BAR1 support - add GPU interrupts and GSP events support - GSP messaging fixes tyr: - use bitfield! - zero unsupported and newly added GPU info fields - limit doorbell array to 17 entries exynos: - FIMD fixes - Fix clock leak on resume error path - Fix Sparse warnings by adding missing __iomem annotation - VIDI cleanup - Replace kmalloc() and copy_from_user() with memdup_user() amdxdna: - fix BO handling - Support AIE2 rev 9 - Fix UAF access in scheduler fences - Update workqueue interface - expose busy time via fdinfo ast: - support 256-byte EDID hyperv_drm: - remove support for pre win10 hosts komeda: - fix GLB_CORE_ID usage omap: - report HDMI hotplug events to ASoC HDMI codec panthor: - provide gpu_cache_flush tracepoint - improve dma_fence signalling latency - improve locking - export scheduling information via debugfs - Validate user-space input against firmware limits qaic: - reject BOs that exceed maximum page count - add missing include statements verisilicon: - fix hardware cursor offsets vkms: - implement YUV-to-RGB with fixed-matrix colorop gma500: - avoid unsupported ARGB formats in primary plane hibmc: - handle vblank interrupts correctly ivpu: - add DRM_IVPU_CAP_CMDQ_SET_PRIORITY - support command-queue priority ioctl - Simplify NULL-pointer handling in cleanup code arcpgu: - replace simple-display pipeline with regular atomic helpers aspeed: - replace simple-display pipeline with regular atomic helpers gm12u320: - replace simple-display pipeline with regular atomic helpers imagination: - various improvement to firmware interaction - add job to pvr_job_submit_fw trace event mali-dp: - fix runtime PM leak mcde: - replace simple-display pipeline with regular atomic helpers p111: - replace simple-display pipeline with regular atomic helpers - drop unsupported alpha formats from primary plane rcar-du: - support Renesas R-Car V4H DSC - dsi: Support larger transfers with AXI memory - Support RZ/G3L SoC repaper: - replace simple-display pipeline with regular atomic helpers rockchip: - dsi: improve PHY timings ssd130x: - support Solomon SSD1351 OLED plus DT bindings - ssd133x: upgrade color format to RGB565 - ssd132x: Set correct hardware window when clearing screen tve200: - replace simple-display pipeline with regular atomic helpers xen: - replace simple-display pipeline with regular atomic helpers v3d: - improve job handling under perfmon vc4: - reliably reset V3D - drop brcm,vc4-v3d compatible virtio: - fix damage handling - Support ARGB8888 for virtio primary planes. host1x: - Support partitioning imx: - Replace simple-display with regular atomic helpers mxsfb: - Support bus formats plus DT bindings tegra: - improve syncobj handling on submit panfrost: - add Mali-G68 support - improve GPU reset handling rockchip: - add HDMI 2.0 support to dw-hdmi-qp - improve HPD handling" * tag 'drm-next-2026-10-21' of https://gitlab.freedesktop.org/drm/kernel: (2324 commits) drm/adp: Switch to drm_atomic_helper_connector_create_state drm/malidp: Convert to atomic_create_state drm/vc4: Switch to drm_atomic_helper_connector_create_state drm/sysfb: Switch to drm_atomic_helper_connector_create_state drm/solomon: ssd130x: Switch to drm_atomic_helper_connector_create_state drm/imx: ipuv3: Switch to drm_atomic_helper_connector_create_state drm/hyperv: Switch to drm_atomic_helper_connector_create_state drm/bridge: megachips: Switch to drm_atomic_helper_connector_create_state drm/bridge: lontium-lt8912b: Switch to drm_atomic_helper_connector_create_state drm/arm: komeda: Switch to drm_atomic_helper_connector_create_state drm/appletbdrm: Fix incorrect error message on encoder attach failure drm/sun4i: hdmi: Convert to drmm_connector_hdmi_init() drm/rockchip: rk3066_hdmi: Advertise HDMI 1.4 capabilities drm/bridge: lontium-lt9611: Advertise HDMI 1.4 capabilities drm/bridge: ite-it66121: Advertise HDMI 1.2 capabilities drm/bridge: ite-it6263: Advertise HDMI 1.3 capabilities drm/bridge: ite-it6263: Drop redundant .mode_valid hook drm/bridge: inno-hdmi: Advertise HDMI 1.2 capabilities drm/bridge: adv7511: Advertise HDMI 1.2 capabilities drm/sched: Document entity->stopped is protected by entity->lock ...
11 daysdrm/amd/display: Fix swap in median3() for DSC rate controlKeita Morisaki
median3() is meant to return the median of three values, but its last compare-and-swap step swaps b and c instead of a and b. When c is smaller than both a and b, it returns max(a, b) instead of min(a, b). For example, median3(2, 3, 1) returns 3 instead of 2. _do_calc_rc_params() always passes 0 as the first argument, and the second argument is never below 12. So whenever the third argument is negative, first_line_bpg_offset (and second_line_bpg_offset for 4:2:0) is set to the second argument instead of 0. Fix this by swapping a and b in the last step, as intended. Note that this change does not affect valid DSC configurations. The third argument is negative only when bits per pixel exceeds the uncompressed rate of the colour format: - 3 * bpc for 4:4:4, 3 * bpc + 2 for RGB - 2 * bpc for 4:2:2 - 1.5 * bpc for 4:2:0 Fixes: 97bda0322b8a ("drm/amd/display: Add DSC support for Navi (v2)") Signed-off-by: Keita Morisaki <kmta1236@gmail.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 1ddc4bc97a62fc89d9d3681413d9f977e1fa1a83) Cc: stable@vger.kernel.org
11 daysdrm/amd/display: Adjust HDMI FRL LT timeoutIlya Bakoulin
[Why & How] Extend LT timeout for link rates <16G to avoid intermittent compliance failures. Reviewed-by: Relja Vojvodic <relja.vojvodic@amd.com> Reviewed-by: Chris Park <chris.park@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 378e096423269a466d23a5d5ce65051e8ef1e474)
11 daysdrm/amd/display: don't WARN when removing an unallocated MST payloadMario Limonciello
[Why] On an MST teardown that runs through the reset path (dcn31_reset_hw_ctx_wrap -> link_set_dpms_off -> deallocate_mst_payload), fill_dc_mst_payload_table_from_drm() is asked to remove a payload whose vcpi is not present in link->mst_stream_alloc_table and trips: WARNING: .../amdgpu_dm_helpers.c:275 fill_dc_mst_payload_table_from_drm This is a legitimate case, not an error: deallocate_mst_payload() can be called for a stream whose MST payload was never programmed into DC's HW-maintained table (a new stream created for a modeset whose enable never completed, as already documented in deallocate_mst_payload()). There is simply nothing to remove. [How] Drop the ASSERT and fall through to the fill loop, which rebuilds the allocation table from the remaining entries. The table ends up unchanged, which is correct: the payload being removed was never in it. Note the loop must not early-return here - the caller passes a zeroed proposed_table, so returning early would zero the whole link's table and drop the other MST streams sharing the link. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/5875 Reviewed-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 88a27f624dc0ebc14a7ab274a84d977ce8513cb6) Cc: stable@vger.kernel.org
11 daysdrm/amd/display: Fix HDMI FRL FFE compliance testIlya Bakoulin
[Why & How] The FFE electrical compliance test behavior is not correct. The driver doesn't properly iterate over the FFE levels and select PS/DE based on test request and/or cable-ID. Fix the initialization of the link state so that when the polling loop takes over, the test proceeds as described in the spec. Reviewed-by: Relja Vojvodic <relja.vojvodic@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 1903c3389c81bc65f57f0edeea879359d674bb33)
2026-10-15drm/amd/display: Fix NULL sink dereference in USB4 bandwidth functionsSrinivasan Shanmugam
allocate_usb4_bandwidth_for_stream() and allocate_usb4_bandwidth() both use ASSERT(stream->sink) before dereferencing stream->sink->link. ASSERT is compiled out in production builds, so a NULL stream->sink causes a NULL pointer dereference. link_set_dpms_off() already guards two earlier accesses to stream->sink with explicit NULL checks, confirming that stream->sink can legitimately be NULL. The subsequent call to deallocate_usb4_bandwidth() had no equivalent guard. Replace the ASSERT() calls with proper NULL checks that return false early, and add a matching stream->sink guard at the call site in link_set_dpms_off() consistent with the surrounding pattern. v2: Keep the existing ASSERT() calls for diagnostics (to report unexpected NULL sink), and add explicit NULL checks that return false before dereferencing stream->sink. Also add a matching stream->sink guard at the deallocation call site in link_set_dpms_off(). (Alex) Fixes: 8fa813b7fd1e ("drm/amd/display: Remove sink usage from DPMS") Reported-by: Dan Carpenter <error27@gmail.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Dominik Kaszewski <dominik.kaszewski@amd.com> Cc: George Zhang <george.zhang@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Roman Li <Roman.Li@amd.com> Cc: Ivan Lipski <ivan.lipski@amd.com> Cc: Dan Wheeler <daniel.wheeler@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 98029a0ce61feb52c563f65349dd9b25f672e355) Cc: stable@vger.kernel.org
2026-10-11Merge tag 'amd-drm-next-7.4-2026-10-08' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/amdgpu/kernel into drm-next amd-drm-next-7.4-2026-10-08: amdgpu: - Fix direct scanout alpha on some DRM_FORMATs - UserQ fixes - Fix for PSR with tearing flips - GPU reset vblank fix - Debugfs register interface fix - Fix mode patching - Expand Mac reserved memory workaround - GC 12.1 fixes - Clean up MES/HWS vmid mask handling - Make runtime pm more fine grained - A+A SPM fixes - SR-IOV fixes - 3D LUT fixes - HDMI fixes - DCN 4.2 fixes - HDMI VRR fixes - DC tracing fixes - UALink fixes amdkfd: - SDMA doorbell fix - Fix dma-buf reference leak in error path Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20261008212310.2508510-1-alexander.deucher@amd.com
2026-10-09BackMerge tag 'v7.3-rc6' into drm-nextDave Airlie
Linux 7.3-rc6 This was requested by Thomas to have a new base to start some branch from Signed-off-by: Dave Airlie <airlied@redhat.com>
2026-10-07drm/amd/display: Don't replace a sink mode that shares the native totalsAdrian Betschart
decide_crtc_timing_for_drm_display_mode() copies the native mode's CRTC timing into the requested mode when clock, htotal and vtotal match. That is meant for the modes amdgpu inserts itself: amdgpu_dm_create_common_mode() duplicates the native mode and changes only hdisplay and vdisplay, so those are sent with the native timing and scaled. A sink can also offer a real mode with the same clock and totals as its native mode. CTA-861 VIC 102 (4096x2160@60) and VIC 97 (3840x2160@60) both use 594 MHz and 4400x2250. With 3840x2160@60 as the preferred mode, a 4096x2160@60 request goes out with the 3840x2160 timing and the framebuffer scaled into it (dst 3840x2025 at y=67), while the AVI InfoFrame still carries VIC 102. A JVC projector then reports 3840x2160 and shows a corrupted right edge. 4096x2160@24, whose totals differ, is sent and displayed correctly. Inserted modes keep the native sync positions; a real mode with its own active width does not. Compare those too, so only inserted modes are patched. Fixes: 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)") Signed-off-by: Adrian Betschart <adrian.betschart@cinemaone.ch> Assisted-by: Claude-Code:claude-opus-5-5 Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 22f9a2da101c37f821cd00954f81dc598754f4d5) Cc: stable@vger.kernel.org
2026-10-07drm/amd/display: disable self-refresh on tearing flipsLeo Li
[Why & How] Immediate (tearing) flips breaks self refresh state machine assumptions, so disable PSR/Replay for them. Tested-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit acbdd213b37e095f15685f3e3ee6d35defa05616) Cc: stable@vger.kernel.org
2026-10-07drm/amd/display: Fix direct scanout alpha on some DRM_FORMATsLeo Li
[Why] DM was declaring it's own list of has_alpha DRM formats to check against for enabling alpha blending, when the format->has_alpha already does that for us. The self-declared list missed some has_alpha formats, causing direct-scanout planes with such formats to appear opaque. [How] Drop the self-declared list, instead use the format->has_alpha field directly. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 9ecdac91ed43d836683d5daa467f4907405420e2) Cc: stable@vger.kernel.org
2026-10-07drm/amd/display: only clear the hotplug sources the ASIC hasMattia Tadini
amdgpu_dm_hpd_init() clears every hotplug source in the enum before enabling the ones it needs: for (i = DC_IRQ_SOURCE_HPD1; i <= DC_IRQ_SOURCE_HPD6RX; i++) DC fills the unused slots of its interrupt table with dummy handlers that assert when touched, so on an ASIC with fewer than six HPD lines that sweep warns and taints the kernel. DCN 2.0.1 has two: mmHPD0_DC_HPD_INT_CONTROL and mmHPD1_DC_HPD_INT_CONTROL are the only hotplug registers in dcn_2_0_1_offset.h, against five in dcn_2_1_0_offset.h, and irq_service_dcn201.c defines hpd_int_entry(0) and (1) accordingly. On an AMD BC-250, which appears to be the only GPU using DCN 201, every boot produces this for sources 3 to 6: [drm] *ERROR* dal_irq_service_dummy_ack: called for non-implemented irq source, src_id=0, ext_id=0 [drm] dal_irq_service_set: src: 3, st: 0 WARNING: .../display/dc/irq/irq_service.c:129 at dal_irq_service_set.cold+0x2d/0x76 [amdgpu] dal_irq_service_set+0x4c/0x100 [amdgpu] amdgpu_dm_hpd_init.cold+0x15/0x12e [amdgpu] dm_hw_init+0x4c/0x170 [amdgpu] amdgpu_device_init.cold+0x1727/0x1ec0 [amdgpu] and the machine comes up tainted W, which makes every unrelated bug report from it harder to read. Walk the links this ASIC has instead of the whole enum, and skip a link with no hotplug line of its own, which is the same guard the enable loop further down already applies. A source owned by a real link is implemented by definition, so the dummy handlers are no longer reached. Parts with six HPD lines are unaffected. Signed-off-by: Mattia Tadini <info@mtsistemi.it> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Don't replace a sink mode that shares the native totalsAdrian Betschart
decide_crtc_timing_for_drm_display_mode() copies the native mode's CRTC timing into the requested mode when clock, htotal and vtotal match. That is meant for the modes amdgpu inserts itself: amdgpu_dm_create_common_mode() duplicates the native mode and changes only hdisplay and vdisplay, so those are sent with the native timing and scaled. A sink can also offer a real mode with the same clock and totals as its native mode. CTA-861 VIC 102 (4096x2160@60) and VIC 97 (3840x2160@60) both use 594 MHz and 4400x2250. With 3840x2160@60 as the preferred mode, a 4096x2160@60 request goes out with the 3840x2160 timing and the framebuffer scaled into it (dst 3840x2025 at y=67), while the AVI InfoFrame still carries VIC 102. A JVC projector then reports 3840x2160 and shows a corrupted right edge. 4096x2160@24, whose totals differ, is sent and displayed correctly. Inserted modes keep the native sync positions; a real mode with its own active width does not. Compare those too, so only inserted modes are patched. Fixes: 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)") Signed-off-by: Adrian Betschart <adrian.betschart@cinemaone.ch> Assisted-by: Claude-Code:claude-opus-5-5 Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: copy function name into dcn_optc_lock_unlock_state trace eventMelissa Wen
Userspace trace tools that use libtraceevent to read binary buffer only see a kernel address when printing const char *. Use string macros in dcn_optc_lock_unlock_state to copy the function name into the trace event. Fixes: f1943a51f0f9 ("drm/amd/display: Add events log to trace OPTC lock and unlock") Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Melissa Wen <mwen@igalia.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: copy function name into dcn_fpu trace eventMelissa Wen
Userspace trace tools that use libtraceevent to read binary buffer only see a kernel address when printing const char *. Use string macros in dcn_fpu to copy the function name into the trace event. Fixes: 96ee63730fa3 ("drm/amd/display: Add control mechanism for FPU") Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: remove redundant cast on amdgpu_dc_reg_template printkMelissa Wen
Commit 0cf5eb76e2b4 ("drm/amd/display: Add tracing to dc") prints and casts uint32_t fields in amdgpu_dc_reg_template to unsigned long unnecessarily. Just print those fields with %08x and remove the redundant cast. Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: use right type for amdgpu_dc_performance event entriesMelissa Wen
Some amdgpu_dc_performance trace event params are passed as unsigned long but stored as uint32_t, cutting them off on 64-bit. Use the right type on entry fields and on printk use unsigned format accordingly. Fixes: 0cf5eb76e2b4 ("drm/amd/display: Add tracing to dc") Signed-off-by: Melissa Wen <mwen@igalia.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: declare amdgpu_dm_atomic_state_template as an event classMelissa Wen
Don't create an amdgpu_dm_atomic_state_template event since this is just a template. Declare the template as an event class that will be used by actual event tracers. Fixes: e8a982355f96 ("drm/amd/display: Add tracepoint for amdgpu_dm") Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: fix vready offset assignment in dcn_optc_lock_unlock_stateMelissa Wen
vready_offset is captured by optc_state, but the trace point entry is wrongly assigned to vupdate_offset. Fix vready_offset tracepoint field in dcn_optc_lock_unloack_state to record optc_state->vready_offset. Fixes: f1943a51f0f9 ("drm/amd/display: Add events log to trace OPTC lock and unlock") Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: remove duplicated prev_p_state_change_support assignmentMelissa Wen
The prev_p_state_change_support trace entry is assigned and printed twice, remove the unnecessary duplicates. Fixes: 13b5ca42ca9c ("drm/amd/display: Add tracepoint for capturing clocks state") Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: assign missing trace entry in amdgpu_dm_dc_clocks_stateMelissa Wen
disp_dpp_voltage_level_khz is declared and printed, but never assigned. So when using clock tracepoint the value of this clock is just garbage. Assign clk->disp_dpp_voltage_level_khz since this is stored in dc_clocks as other entries. Fixes: 13b5ca42ca9c ("drm/amd/display: Add tracepoint for capturing clocks state") Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Promote DC to 3.2.401Ashwin Santhosh
This version brings along the following updates: - Add HDMI RR and SCDC skips. - Add debug option to override low power SR latencies. - Allow skipping link bandwidth clear. - Handle virtual link encoder. - Improve MCM shaper/3DLUT programming and DTN logging. - Only reprogram DRR when v_total values change. - Refactor DMUB fast lock sequencing. - Send HDMI VRR metadata in VTEM info packet slot. - Set cursor_offload for all pipes for a given stream. - Skip link off frame count for general UI. - Update link training no timeout behaviour on HDMI. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Ashwin Santhosh <Ashwin.Santhosh@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Send HDMI VRR metadata in VTEM info packet slotIvan Lipski
[Why] Brief blank on HDMI each time VRR engaged and disengaged, with no modeset at either transition. amdgpu_dm_update_freesync_state_on_stream() built the VTEM on top of the buffer holding the AMD FreeSync SPD payload, which becomes stream->vrr_infopacket. DC routes that to HDMI generic slot 3 (SPD) and vtem_infopacket to slot 6 (VTEM), and vtem_infopacket was never populated. So slot 3 carried a VTEM payload the sink parsed as an SPD InfoFrame, no VTEM was sent, and v_total varied with no valid metadata describing it. DP uses the VSC/AS-SDP path and is unaffected. [How] Build the VTEM into a separate vtem_infopacket, gated on the sink not advertising AMD FreeSync. Track it in dm_crtc_state, include it in the freesync_vrr_info_changed comparison and the reset path, and pass it through bundle->stream_update.vtem_infopacket. Reviewed-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Add debug option to override low power SR latenciesAlvin Lee
[Description] - Add debug options to override low power SR latencies - Match regular SR latency debug override Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Add dcn42b project idDillon Varone
[WHY&HOW] Add project ID to distinguish dcn42b from dcn42. Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Handle virtual link encoderSridevi Arvindekar
[Why/How] Fix check for virtual link encoder Reviewed-by: Ilya Bakoulin <ilya.bakoulin@amd.com> Signed-off-by: Sridevi Arvindekar <sridevi.arvindekar@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Revert "avoid to write signal specific for tmds"Joshua Aberback
This reverts commit 93179870ae52d1663080655fb8f0170a82cf9951. The change regressed HDMI output on the TMDS-to-FRL switch. Reviewed-by: Martin Leung <martin.leung@amd.com> Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Update link training no timeout behaviour on HDMIRelja Vojvodic
[Why & How] - HMDI link training compliance testing fails when no timeout bit is set - Update condition to skip some link training logic when no timeout is set Reviewed-by: Chris Park <chris.park@amd.com> Signed-off-by: Relja Vojvodic <Relja.Vojvodic@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Assign alt wa bit in fams2 cmdAlvin Lee
[Description] Assign the workaround bit to ensure it propagates to FW Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Prepare DSC configuration before BLS executionRafal Ostrowski
[Why] DSC sequence operations calculated configuration during execution and passed OPTC outputs through pointers into other sequence steps. This coupled consumers to step storage and mixed calculation with programming. [How] Merge the DSC configuration operations into DSC_SET_CONFIG. Prepare register values in each DSC instance during build and pass OPTC values by value to timing-generator and stream-encoder operations. Share stream composition while preserving link-update and ODM padding. Use the correct DCN401 preparation callback and remove the legacy ops. Validate local composition inputs and capacity, stop immediate programming on preparation failure, and publish prepared caches only on success. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Chris Park <chris.park@amd.com> Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: allow skipping link bandwidth clearMartin Tsai
[why] To set link bandwidth with zero could hit error protection from Sink panel to fail link training and cause screen corruption. [how] To skip link bw cleaning in two conditions: 1. eDP v1.5 or latter, because the last write will take effect. 2. Sink requires not to clear it. Reviewed-by: Anthony Koo <anthony.koo@amd.com> Signed-off-by: Martin Tsai <Martin.Tsai@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Skip link off frame count for general UIAllen Li
[Why&How] To improve power saving of Replay, skip the link off frame count check for general UI in DC mode. Also disable timing sync in the same condition. Reviewed-by: ChunTao (Chun-Tao) Tso <chuntao.tso@amd.com> Signed-off-by: Allen Li <Allen.Li@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Refactor DMUB fast lock sequencingRafal Ostrowski
[WHY] Resolve fast-lock policy before execution and avoid queuing no-op steps. Remove duplicated per-ASIC command construction. [HOW] Use one fast-lock opcode, parameter structure and executor. Capture the service handle and precomputed Inbox0 command. Keep separate SubVP and generic capability hooks and preserve the lock manager's original support and split feature gates. Retain the unused SubVP enumerator and existing opcode values. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Set cursor_offload for all pipes for a given streamAlvin Lee
[Description] - When using the cursor offload path, the cursor_offload flag must be set for each DPP and HUBP driving the stream - Previous implementation only sets the flag in the DPP and HUBP for the OTG master pipe - Add helper function to populate an array of DPP's and HUBP's that need to have the cursor_offload flag set - This is to avoid passing in pipe_ctx to hwss execution params Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Add HDMI RR and SCDC skipsIlya Bakoulin
[Why/How] - Add debug key to avoid enabling RR by default. - Skip SCDC access if sink or SCDC cap not present Reviewed-by: Relja (Reggie) Vojvodic <relja.vojvodic@amd.com> Reviewed-by: Chris Park <chris.park@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: only reprogram DRR when v_total values changeAric Cyr
[Why] dc_stream_adjust_vmin_vmax() programmed the OTG on every call. FreeSync BTR calls it once per vblank, so identical v_total values were rewritten every frame, each one paying dc_exit_ips_for_hw_access() and, when FAMS is enabled, a blocking DMUB round trip from setup_manual_trigger(). [How] Return early when timing_adjust_pending is clear and every v_total field already matches the request, so hardware is only touched when the values change. stream->adjust is still updated on every path that continues, so a later commit programs the requested values. timing_adjust_pending is the existing "stream->adjust has not reached hardware" marker, so keep it accurate wherever hardware is left untouched: set_drr_and_clear_adjust_pending() now sets it when called with null params, which resets DRR in the OTG during pipe back-end teardown, and the max_v_total overflow path only clears it when set_long_vtotal() runs. Reviewed-by: Josip Pavic <josip.pavic@amd.com> Signed-off-by: Aric Cyr <Aric.Cyr@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: log MCM shaper and 3D LUT mode in the DTN logHarry Wentland
On DCN4 the per-plane MCM shaper and 3D LUT state wasn't visible in the DTN log: dcn401 wired read_mpcc_state to mpc1_read_mpcc_state, which only reads the base MPCC blend registers, and the MPCC section didn't print the LUT fields even where they were populated. Add mpc401_read_mpcc_state to also read MPCC_MCM_3DLUT_MODE (mode current and size) and MPCC_MCM_SHAPER_CONTROL (mode current), and print SHAPER, 3DLUT and 3DLUT_SIZE columns in the MPCC section. Mode is 0 bypass, 1 RAM_A, 2 RAM_B; 3DLUT_SIZE is 0 for 17x17x17 and 1 for 9x9x9. Assisted-by: Copilot:claude-opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: enable shaper when programming 3DLUTHarry Wentland
The plane-XR30-XR30-3dlut_17_12_rgb kms_colorop test fails on DCN 4.x. We need to make sure we set shaper_enable to enable the shaper block, otherwise the 3DLUT block will stay inactive. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: disable self-refresh on tearing flipsLeo Li
[Why & How] Immediate (tearing) flips breaks self refresh state machine assumptions, so disable PSR/Replay for them. Tested-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-07drm/amd/display: Fix direct scanout alpha on some DRM_FORMATsLeo Li
[Why] DM was declaring it's own list of has_alpha DRM formats to check against for enabling alpha blending, when the format->has_alpha already does that for us. The self-declared list missed some has_alpha formats, causing direct-scanout planes with such formats to appear opaque. [How] Drop the self-declared list, instead use the format->has_alpha field directly. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-03Merge tag 'drm-misc-next-2026-10-02' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for v7.4: Cross-subsystem Changes: Documentation: - Fix indention in display-related DT bindings Core Changes: - Provide helpers for calculating absolute and relative timeouts clients: - fbdev: Move helpers from drm_kms_helper.ko to drm_client_lib.ko display: - dp/mst: Improve DPCD compliance sched: - fix locking Driver changes: amdxdna: - Support AIE2 rev 9 - Fix UAF access in scheduler fences - Update workqueue interface bridge: - Select DRM_PANEL_BRIDGE for various drivers that require it host1x: - Support partitioning imagination - Clean up firmware interface imx: - Replace simple-display with regular atomic helpers ivpu: - Simplify NULL-pointer handling in cleanup code mxsfb: - Support bus formats plus DT bindings panel: - ebbg-ft8719: Fix MODULE_LICENSE() string; Improve initialization - edp: NV140WU2-M70 - ilitek-ili9882t: Support Ilitek IL79600A plus DT bindings - simple: Support Truly TFT320240-229-E plus DT bindings; Support BOE DV215FHM-R01 plus DT bindings - Refactor struct drm_panel to contain struct drm_bridge plus fallout in various panel drivers panthor: - Validate user-space input against firmware limits renesas: - Support RZ/G3L SoC ssd130x: - ssd132x: Set correct hardware window when clearing screen host1x: - support partitioning panel: - fix fallout from bridge-related changes tegra: - improve syncobj handling on submit Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20261002120720.GA720384@linux.fritz.box
2026-10-02Revert "drm/amd/display: Attach blend mode property for alpha planes"Alex Deucher
This reverts commit 44139872f22350b1e6c45da80e414caca81f11f5. This regresses blend mode handling. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-02Revert "drm/amd/display: replace STATIC_IFN_KUNIT with VISIBLE_IF_KUNIT"Alex Deucher
This reverts commit 7e9fca772695c65f97493272e2e7cd475f202965. This series breaks the build when CONFIG_KUNIT=y and CONFIG_DRM_AMD_DC_KUNIT_TEST=n. When CONFIG_KUNIT=y, the functions are not static, but when CONFIG_DRM_AMD_DC_KUNIT_TEST=n, they should be. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-10-02Revert "drm/amd/display: replace EXPORT_IF_KUNIT with EXPORT_SYMBOL_IF_KUNIT"Alex Deucher
This reverts commit b6b813e046e475bb3fe209d74f1df70033b5b98e. This series breaks the build when CONFIG_KUNIT=y and CONFIG_DRM_AMD_DC_KUNIT_TEST=n. When CONFIG_KUNIT=y, the functions are not static, but when CONFIG_DRM_AMD_DC_KUNIT_TEST=n, they should be. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>