lwn.git - Linux kernel documentation tree maintained by Jonathan Corbet

Age	Commit message (Expand)	Author
2024-12-02	module: Convert symbol namespace to string literal	Peter Zijlstra
2024-09-30	clk: meson: mpll: Delete a useless spinlock from the MPLL	Chuan Liu
2024-07-29	clk: meson: introduce symbol namespace for amlogic clocks	Jerome Brunet
2024-06-14	clk: meson: add missing MODULE_DESCRIPTION() macros	Jerome Brunet
2024-04-10	clk: meson: fix module license to GPL only	Neil Armstrong
2024-02-05	clk: meson: Add missing clocks to axg_clk_regmaps	Igor Prusov
2023-08-30	Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and ...	Stephen Boyd
2023-08-08	clk: meson: eeclk: move bindings include to main driver	Neil Armstrong
2023-08-08	clk: meson: migrate meson-eeclk out of hw_onecell_data to drop NR_CLKS	Neil Armstrong
2023-07-19	clk: Explicitly include correct DT includes	Rob Herring
2021-02-09	clk: meson: axg: Remove MIPI enable clock gate	Remi Pommarel
2020-11-23	clk: meson: enable building as modules	Kevin Hilman
2020-11-23	clk: meson: axg: add MIPI DSI Host clock	Neil Armstrong
2020-11-23	clk: meson: axg: add Video Clocks	Neil Armstrong
2019-07-29	clk: meson: clk-regmap: migrate to new parent description method	Alexandre Mergnat
2019-07-29	clk: meson: axg: migrate to the new parent description method	Alexandre Mergnat
2019-05-20	clk: meson: axg: spread spectrum is on mpll2	Jerome Brunet
2019-02-04	clk: meson: factorise meson64 peripheral clock controller drivers	Jerome Brunet
2019-02-02	clk: meson: rework and clean drivers dependencies	Jerome Brunet
2019-01-18	clk: meson: axg: claim clock controller input clock from DT	Jerome Brunet
2018-11-08	clk: meson: axg: mark fdiv2 and fdiv3 as critical	Jerome Brunet
2018-09-26	clk: meson-axg: pcie: drop the mpll3 clock parent	Yixun Lan
2018-09-26	clk: meson: clk-pll: drop hard-coded rates from pll tables	Jerome Brunet
2018-09-26	clk: meson: clk-pll: remove od parameters	Jerome Brunet
2018-09-26	clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary	Jerome Brunet
2018-09-26	clk: meson: clk-pll: add enable bit	Jerome Brunet
2018-07-09	clk: meson: add gen_clk	Jerome Brunet
2018-07-09	clk: meson-axg: add clocks required by pcie driver	Yixun Lan
2018-07-09	clk: meson: remove obsolete register access	Jerome Brunet
2018-05-21	clk: meson: axg: let mpll clocks round closest	Jerome Brunet
2018-03-14	clk: meson: Drop unused local variable and add static	Stephen Boyd
2018-03-13	clk: meson: add fdiv clock gates	Jerome Brunet
2018-03-13	clk: meson: add mpll pre-divider	Jerome Brunet
2018-03-13	clk: meson: axg: add hifi pll clock	Jerome Brunet
2018-03-13	clk: meson: add gp0 frac parameter for axg and gxl	Jerome Brunet
2018-03-13	clk: meson: remove special gp0 lock loop	Jerome Brunet
2018-03-13	clk: meson: poke pll CNTL last	Jerome Brunet
2018-03-13	clk: meson: use hhi syscon if available	Jerome Brunet
2018-03-13	clk: meson: split divider and gate part of mpll	Jerome Brunet
2018-03-13	clk: meson: migrate plls clocks to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: migrate mplls clocks to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: migrate muxes to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: migrate dividers to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: migrate gates to clk_regmap	Jerome Brunet
2018-03-13	clk: meson: add regmap to the clock controllers	Jerome Brunet
2018-03-13	clk: meson: remove obsolete comments	Jerome Brunet
2018-03-13	clk: meson: only one loop index is necessary in probe	Jerome Brunet
2018-03-13	clk: meson: use devm_of_clk_add_hw_provider	Jerome Brunet
2018-03-13	clk: meson: use dev pointer where possible	Jerome Brunet
2018-02-12	clk: meson: add axg misc bit to the mpll driver	Jerome Brunet