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drivers
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clk
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ingenic
Age
Commit message (
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Author
2018-06-01
clk: ingenic: jz4770: Add 150us delay after enabling VPU clock
Paul Cercueil
2018-06-01
clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock
Paul Cercueil
2018-06-01
clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle
Paul Cercueil
2018-06-01
clk: ingenic: jz4770: Change OTG from custom to standard gated clock
Paul Cercueil
2018-06-01
clk: ingenic: Support specifying "wait for clock stable" delay
Paul Cercueil
2018-06-01
clk: ingenic: Add support for clocks whose gate bit is inverted
Paul Cercueil
2018-01-18
clk: Add Ingenic jz4770 CGU driver
Paul Cercueil
2018-01-18
clk: ingenic: Add code to enable/disable PLLs
Paul Cercueil
2018-01-18
clk: ingenic: support PLLs with no bypass bit
Paul Cercueil
2018-01-18
clk: ingenic: Fix recalc_rate for clocks with fixed divider
Paul Cercueil
2018-01-18
clk: ingenic: Use const pointer to clk_ops in struct
Paul Cercueil
2017-11-03
Update MIPS email addresses
Paul Burton
2016-05-12
clk: ingenic: Allow divider value to be divided
Harvey Hunt
2015-07-20
clk: ingenic: Include clk.h
Stephen Boyd
2015-06-21
clk: ingenic: add JZ4780 CGU support
Paul Burton
2015-06-21
MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cgu
Paul Burton
2015-06-21
MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cgu
Paul Burton
2015-06-21
MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cgu
Paul Burton
2015-06-21
MIPS,clk: migrate JZ4740 to common clock framework
Paul Burton
2015-06-21
clk: ingenic: add driver for Ingenic SoC CGU clocks
Paul Burton
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