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Commit message (
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Author
2023-11-07
RISC-V: Show accurate per-hart isa in /proc/cpuinfo
Evan Green
2023-11-07
RISC-V: Don't rely on positional structure initialization
Palmer Dabbelt
2023-11-07
Merge patch series "riscv: Add remaining module relocations and tests"
Palmer Dabbelt
2023-11-07
riscv: Add tests for riscv module loading
Charlie Jenkins
2023-11-07
riscv: Add remaining module relocations
Charlie Jenkins
2023-11-07
riscv: Avoid unaligned access when relocating modules
Emil Renner Berthing
2023-11-07
riscv: split cache ops out of dma-noncoherent.c
Christoph Hellwig
2023-11-06
riscv: select ARCH_PROC_KCORE_TEXT
Andreas Schwab
2023-11-06
riscv: kernel: Use correct SYM_DATA_*() macro for data
Clément Léger
2023-11-06
riscv: Use SYM_*() assembly macros instead of deprecated ones
Clément Léger
2023-11-06
riscv: use ".L" local labels in assembly when applicable
Clément Léger
2023-11-06
riscv: boot: Fix creation of loader.bin
Geert Uytterhoeven
2023-11-06
Merge patch series "riscv: tlb flush improvements"
Palmer Dabbelt
2023-11-06
riscv: Improve flush_tlb_kernel_range()
Alexandre Ghiti
2023-11-06
riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlb
Alexandre Ghiti
2023-11-06
riscv: Improve flush_tlb_range() for hugetlb pages
Alexandre Ghiti
2023-11-06
riscv: Improve tlb_flush()
Alexandre Ghiti
2023-11-05
riscv: mm: update T-Head memory type definitions
Jisheng Zhang
2023-11-05
Merge patch series "riscv: vdso.lds.S: some improvement"
Palmer Dabbelt
2023-11-05
riscv: vdso.lds.S: remove hardcoded 0x800 .text start addr
Jisheng Zhang
2023-11-05
riscv: vdso.lds.S: merge .data section into .rodata section
Jisheng Zhang
2023-11-05
riscv: vdso.lds.S: drop __alt_start and __alt_end symbols
Jisheng Zhang
2023-11-05
riscv: add userland instruction dump to RISC-V splats
Yunhui Cui
2023-11-05
riscv: kprobes: allow writing to x0
Nam Cao
2023-11-05
riscv: provide riscv-specific is_trap_insn()
Nam Cao
2023-11-05
Merge patch series "Improve PTDUMP and introduce new fields"
Palmer Dabbelt
2023-11-05
riscv: Introduce NAPOT field to PTDUMP
Yu Chien Peter Lin
2023-11-05
riscv: Introduce PBMT field to PTDUMP
Yu Chien Peter Lin
2023-11-05
riscv: Improve PTDUMP to show RSW with non-zero value
Yu Chien Peter Lin
2023-11-05
RISC-V: capitalise CMO op macros
Conor Dooley
2023-11-05
riscv: don't probe unaligned access speed if already done
Jisheng Zhang
2023-11-05
riscv: defconfig : add CONFIG_MMC_DW for starfive
Jinyu Tang
2023-11-05
riscv: signal: handle syscall restart before get_signal
Haorong Lu
2023-11-05
Merge patch series "Add support to handle misaligned accesses in S-mode"
Palmer Dabbelt
2023-11-02
RISC-V: hwprobe: Fix vDSO SIGSEGV
Andrew Jones
2023-11-02
riscv: configs: defconfig: Enable configs required for RZ/Five SoC
Lad Prabhakar
2023-11-02
Merge patch series "riscv: SCS support"
Palmer Dabbelt
2023-11-02
Merge patch "riscv: errata: improve T-Head CMO"
Palmer Dabbelt
2023-11-02
riscv: errata: prefix T-Head mnemonics with th.
Icenowy Zheng
2023-11-01
riscv: add support for PR_SET_UNALIGN and PR_GET_UNALIGN
Clément Léger
2023-11-01
riscv: report misaligned accesses emulation to hwprobe
Clément Léger
2023-11-01
riscv: annotate check_unaligned_access_boot_cpu() with __init
Clément Léger
2023-11-01
riscv: add support for sysctl unaligned_enabled control
Clément Léger
2023-11-01
riscv: add floating point insn support to misaligned access emulation
Clément Léger
2023-11-01
riscv: report perf event for misaligned fault
Clément Léger
2023-11-01
riscv: add support for misaligned trap handling in S-mode
Clément Léger
2023-11-01
riscv: remove unused functions in traps_misaligned.c
Clément Léger
2023-10-31
Merge patch series "RISC-V: ACPI improvements"
Palmer Dabbelt
2023-10-31
riscv: put interrupt entries into .irqentry.text
Nam Cao
2023-10-31
riscv: mm: Update the comment of CONFIG_PAGE_OFFSET
Song Shuai
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