lwn.git - Linux kernel documentation tree maintained by Jonathan Corbet

Age	Commit message (Expand)	Author
2024-01-20	Merge tag 'riscv-for-linus-6.8-mw4' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds
2024-01-11	Merge patch series "RISC-V SBI debug console extension support"	Palmer Dabbelt
2024-01-11	riscv: sbi: Introduce system suspend support	Andrew Jones
2024-01-10	RISC-V: Add SBI debug console helper routines	Anup Patel
2024-01-10	RISC-V: Add stubs for sbi_console_putchar/getchar()	Anup Patel
2023-12-30	RISC-V: Add SBI STA extension definitions	Andrew Jones
2023-11-10	Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds
2023-11-06	riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlb	Alexandre Ghiti
2023-10-20	RISC-V: Add defines for SBI debug console extension	Anup Patel
2023-04-29	RISC-V: Align SBI probe implementation with spec	Andrew Jones
2023-04-08	RISC-V: Treat IPIs as normal Linux IRQs	Anup Patel
2023-02-07	RISC-V: Improve SBI PMU extension related definitions	Atish Patra
2022-10-27	RISC-V: Cache SBI vendor values	Heiko Stuebner
2022-08-11	RISC-V: Improve SBI definitions	Atish Patra
2022-08-11	RISC-V: Move counter info definition to sbi header file	Atish Patra
2022-03-25	Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/ke...	Linus Torvalds
2022-03-21	RISC-V: Add RISC-V SBI PMU extension definitions	Atish Patra
2022-03-11	RISC-V: Add SBI HSM suspend related defines	Anup Patel
2022-01-20	RISC-V: Do not use cpumask data structure for hartid bitmap	Atish Patra
2022-01-19	Merge tag 'riscv-for-linus-5.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...	Linus Torvalds
2022-01-11	RISC-V: Use SBI SRST extension when available	Anup Patel
2022-01-06	RISC-V: KVM: Add SBI HSM extension in KVM	Atish Patra
2022-01-06	RISC-V: KVM: Add SBI v0.2 base extension	Atish Patra
2021-05-06	Merge tag 'riscv-for-linus-5.13-mw0' of git://git.kernel.org/pub/scm/linux/ke...	Linus Torvalds
2021-04-26	riscv: Add 3 SBI wrapper functions to get cpu manufacturer information	Vincent Chen
2021-03-09	RISC-V: correct enum sbi_ext_rfence_fid	Heinrich Schuchardt
2021-02-22	RISC-V: Add a non-void return for sbi v02 functions	Atish Patra
2021-01-07	riscv: Cleanup sbi function stubs when RISCV_SBI disabled	Kefeng Wang
2020-03-31	RISC-V: Add SBI HSM extension definitions	Atish Patra
2020-03-31	RISC-V: Export SBI error to linux error mapping function	Atish Patra
2020-03-31	RISC-V: Implement new SBI v0.2 extensions	Atish Patra
2020-03-31	RISC-V: Introduce a new config for SBI v0.1	Atish Patra
2020-03-31	RISC-V: Add SBI v0.2 extension definitions	Atish Patra
2020-03-31	RISC-V: Add basic support for SBI v0.2	Atish Patra
2020-03-31	RISC-V: Mark existing SBI as 0.1 SBI.	Atish Patra
2019-11-17	riscv: provide native clint access for M-mode	Christoph Hellwig
2019-11-13	riscv: add support for MMIO access to the timer registers	Christoph Hellwig
2019-11-13	riscv: implement remote sfence.i using IPIs	Christoph Hellwig
2019-11-13	riscv: poison SBI calls for M-mode	Christoph Hellwig
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner
2019-05-16	riscv: fix sbi_remote_sfence_vma{,_asid}.	Gary Guo
2017-09-26	RISC-V: Device, timer, IRQs, and the SBI	Palmer Dabbelt