lwn.git - Linux kernel documentation tree maintained by Jonathan Corbet

Age	Commit message (Expand)	Author
2024-04-30	riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi	Jisheng Zhang
2024-03-19	Merge tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc...	Linus Torvalds
2024-03-06	Merge tag 'riscv-dt-for-v6.9' of https://git.kernel.org/pub/scm/linux/kernel/...	Arnd Bergmann
2024-03-05	riscv: dts: starfive: jh7100: fix root clock names	Krzysztof Kozlowski
2024-02-13	riscv: dts: starfive: replace underscores in node names	Krzysztof Kozlowski
2024-01-31	riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes	Cristian Ciocaltea
2024-01-22	riscv: dts: starfive: jh7100: Add PWM node and pins configuration	William Qiu
2023-12-13	riscv: dts: starfive: Add JH7100 MMC nodes	Emil Renner Berthing
2023-12-13	riscv: dts: starfive: Add JH7100 cache controller	Emil Renner Berthing
2023-12-13	riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs	Emil Renner Berthing
2023-12-13	riscv: dts: starfive: Group tuples in interrupt properties	Geert Uytterhoeven
2023-10-15	riscv: dts: starfive: convert isa detection to new properties	Conor Dooley
2023-07-25	riscv: dts: starfive: jh7100: Add temperature sensor node and thermal-zones	Hal Feng
2023-05-15	riscv: dts: starfive: jh7100: Add watchdog node	Xingyu Wu
2022-08-11	riscv: dts: starfive: correct number of external interrupts	Mark Kettenis
2022-07-14	riscv: dts: starfive: Add JH7100 CPU topology	Jonas Hahnfeld
2021-12-16	RISC-V: Add initial StarFive JH7100 device tree	Emil Renner Berthing