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path: root/arch/mips/include/asm/mipsregs.h
AgeCommit message (Expand)Author
2011-12-07MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operationsKevin Cernekee
2011-10-24MIPS: Add accessor macros for 64-bit performance counter registers.David Daney
2011-03-31Fix common misspellingsLucas De Marchi
2010-10-29MIPS: Add BMIPS CP0 register definitionsKevin Cernekee
2010-08-05MIPS: Define ST0_NMI in asm/mipsregs.hDavid Daney
2010-05-15 MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1Shane McDonald
2010-02-27MIPS: Add accessor functions and bit definitions for c0_PageGrainDavid Daney
2010-02-27MIPS: Decode c0_config4 for large TLBs.David Daney
2010-01-28MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQsDavid VomLehn
2009-06-17MIPS: Add hugetlbfs page defines.David Daney
2009-05-14MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.Ralf Baechle
2009-05-14MIPS: Cavium: Add support for 8k and 32k page sizes.Ralf Baechle
2009-05-14MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate.Kevin D. Kissell
2009-03-23MIPS: Change {set,clear,change}_c0_<foo> to return old value.Ralf Baechle
2009-01-11MIPS: Override assembler target architecture for octeon.David Daney
2009-01-11MIPS: Add Cavium OCTEON specific register definitions to mipsregs.hDavid Daney
2008-10-27MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processorsShinya Kuribayashi
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle