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path: root/arch/arm/mach-tegra/headsmp.S
AgeCommit message (Expand)Author
2015-06-01ARM: v7 setup function should invalidate L1 cacheRussell King
2013-07-19ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9Joseph Lo
2013-03-11ARM: tegra: don't unlock MMIO access to DBGLARJoseph Lo
2013-02-11Merge branch 'socfpga/hw' into next/socOlof Johansson
2013-02-11arm: Add v7_invalidate_l1 to cache-v7.SDinh Nguyen
2013-01-28ARM: tegra: make device can run on UPJoseph Lo
2013-01-28ARM: tegra: clean up the CPUINIT sectionJoseph Lo
2012-11-15ARM: tegra: retain L2 content over CPU suspend/resumeJoseph Lo
2012-11-15ARM: tegra: cpuidle: add CPU resume functionJoseph Lo
2012-11-05ARM: tegra: move iomap.h to mach-tegraStephen Warren
2012-09-13ARM: tegra: clean up the common assembly macros into sleep.hJoseph Lo
2012-02-26ARM: tegra: support for secondary cores on Tegra30Peter De Schrijver
2012-02-26ARM: tegra: rework Tegra secondary CPU core bringupPeter De Schrijver
2010-08-05[ARM] tegra: SMP supportColin Cross