Age | Commit message (Expand) | Author |
---|---|---|
2015-06-01 | ARM: v7 setup function should invalidate L1 cache | Russell King |
2013-07-19 | ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 | Joseph Lo |
2013-03-11 | ARM: tegra: don't unlock MMIO access to DBGLAR | Joseph Lo |
2013-02-11 | Merge branch 'socfpga/hw' into next/soc | Olof Johansson |
2013-02-11 | arm: Add v7_invalidate_l1 to cache-v7.S | Dinh Nguyen |
2013-01-28 | ARM: tegra: make device can run on UP | Joseph Lo |
2013-01-28 | ARM: tegra: clean up the CPUINIT section | Joseph Lo |
2012-11-15 | ARM: tegra: retain L2 content over CPU suspend/resume | Joseph Lo |
2012-11-15 | ARM: tegra: cpuidle: add CPU resume function | Joseph Lo |
2012-11-05 | ARM: tegra: move iomap.h to mach-tegra | Stephen Warren |
2012-09-13 | ARM: tegra: clean up the common assembly macros into sleep.h | Joseph Lo |
2012-02-26 | ARM: tegra: support for secondary cores on Tegra30 | Peter De Schrijver |
2012-02-26 | ARM: tegra: rework Tegra secondary CPU core bringup | Peter De Schrijver |
2010-08-05 | [ARM] tegra: SMP support | Colin Cross |