summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/bios_parser.c36
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c18
-rw-r--r--drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h9
3 files changed, 0 insertions, 63 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index 30567ef74e5c..91df37c4c8da 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -2419,15 +2419,6 @@ static enum bp_result get_integrated_info_v8(
info->dentist_vco_freq = le32_to_cpu(info_v8->ulDentistVCOFreq) * 10;
info->boot_up_uma_clock = le32_to_cpu(info_v8->ulBootUpUMAClock) * 10;
- for (i = 0; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
- /* Convert [10KHz] into [KHz] */
- info->disp_clk_voltage[i].max_supported_clk =
- le32_to_cpu(info_v8->sDISPCLK_Voltage[i].
- ulMaximumSupportedCLK) * 10;
- info->disp_clk_voltage[i].voltage_index =
- le32_to_cpu(info_v8->sDISPCLK_Voltage[i].ulVoltageIndex);
- }
-
info->boot_up_req_display_vector =
le32_to_cpu(info_v8->ulBootUpReqDisplayVector);
info->gpu_cap_info =
@@ -2570,14 +2561,6 @@ static enum bp_result get_integrated_info_v9(
info->dentist_vco_freq = le32_to_cpu(info_v9->ulDentistVCOFreq) * 10;
info->boot_up_uma_clock = le32_to_cpu(info_v9->ulBootUpUMAClock) * 10;
- for (i = 0; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
- /* Convert [10KHz] into [KHz] */
- info->disp_clk_voltage[i].max_supported_clk =
- le32_to_cpu(info_v9->sDISPCLK_Voltage[i].ulMaximumSupportedCLK) * 10;
- info->disp_clk_voltage[i].voltage_index =
- le32_to_cpu(info_v9->sDISPCLK_Voltage[i].ulVoltageIndex);
- }
-
info->boot_up_req_display_vector =
le32_to_cpu(info_v9->ulBootUpReqDisplayVector);
info->gpu_cap_info = le32_to_cpu(info_v9->ulGPUCapInfo);
@@ -2719,25 +2702,6 @@ static enum bp_result construct_integrated_info(
}
}
- /* Sort voltage table from low to high*/
- if (result == BP_RESULT_OK) {
- int32_t i;
- int32_t j;
-
- for (i = 1; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
- for (j = i; j > 0; --j) {
- if (
- info->disp_clk_voltage[j].max_supported_clk <
- info->disp_clk_voltage[j-1].max_supported_clk) {
- /* swap j and j - 1*/
- swap(info->disp_clk_voltage[j - 1],
- info->disp_clk_voltage[j]);
- }
- }
- }
-
- }
-
return result;
}
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index ee6d52b87b02..06bab03a8579 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -2671,15 +2671,6 @@ static enum bp_result get_integrated_info_v11(
info->dentist_vco_freq = le32_to_cpu(info_v11->ulDentistVCOFreq) * 10;
info->boot_up_uma_clock = le32_to_cpu(info_v8->ulBootUpUMAClock) * 10;
- for (i = 0; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
- /* Convert [10KHz] into [KHz] */
- info->disp_clk_voltage[i].max_supported_clk =
- le32_to_cpu(info_v11->sDISPCLK_Voltage[i].
- ulMaximumSupportedCLK) * 10;
- info->disp_clk_voltage[i].voltage_index =
- le32_to_cpu(info_v11->sDISPCLK_Voltage[i].ulVoltageIndex);
- }
-
info->boot_up_req_display_vector =
le32_to_cpu(info_v11->ulBootUpReqDisplayVector);
info->boot_up_nb_voltage =
@@ -3032,7 +3023,6 @@ static enum bp_result construct_integrated_info(
struct atom_data_revision revision;
int32_t i;
- int32_t j;
if (!info)
return result;
@@ -3134,14 +3124,6 @@ static enum bp_result construct_integrated_info(
DC_LOG_BIOS("driver forced fixdpvoltageswing = %d\n", info->ext_disp_conn_info.fixdpvoltageswing);
}
}
- /* Sort voltage table from low to high*/
- for (i = 1; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
- for (j = i; j > 0; --j) {
- if (info->disp_clk_voltage[j].max_supported_clk <
- info->disp_clk_voltage[j-1].max_supported_clk)
- swap(info->disp_clk_voltage[j-1], info->disp_clk_voltage[j]);
- }
- }
return result;
}
diff --git a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
index a0f03fb67605..3e4e8d55dd0f 100644
--- a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
+++ b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
@@ -273,7 +273,6 @@ struct transmitter_configuration {
#define NUMBER_OF_UCHAR_FOR_GUID 16
#define MAX_NUMBER_OF_EXT_DISPLAY_PATH 7
#define NUMBER_OF_CSR_M3_ARB 10
-#define NUMBER_OF_DISP_CLK_VOLTAGE 4
#define NUMBER_OF_AVAILABLE_SCLK 5
struct i2c_reg_info {
@@ -302,14 +301,6 @@ struct edp_info {
/* V6 */
struct integrated_info {
- struct clock_voltage_caps {
- /* The Voltage Index indicated by FUSE, same voltage index
- shared with SCLK DPM fuse table */
- uint32_t voltage_index;
- /* Maximum clock supported with specified voltage index */
- uint32_t max_supported_clk; /* in KHz */
- } disp_clk_voltage[NUMBER_OF_DISP_CLK_VOLTAGE];
-
struct display_connection_info {
struct external_display_path {
/* A bit vector to show what devices are supported */