diff options
Diffstat (limited to 'drivers/irqchip/irq-davinci-cp-intc.c')
| -rw-r--r-- | drivers/irqchip/irq-davinci-cp-intc.c | 57 |
1 files changed, 21 insertions, 36 deletions
diff --git a/drivers/irqchip/irq-davinci-cp-intc.c b/drivers/irqchip/irq-davinci-cp-intc.c index f4f8e9fadbbf..d7948c55f542 100644 --- a/drivers/irqchip/irq-davinci-cp-intc.c +++ b/drivers/irqchip/irq-davinci-cp-intc.c @@ -11,7 +11,6 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/irqchip.h> -#include <linux/irqchip/irq-davinci-cp-intc.h> #include <linux/irqdomain.h> #include <linux/io.h> #include <linux/of.h> @@ -154,24 +153,20 @@ static const struct irq_domain_ops davinci_cp_intc_irq_domain_ops = { .xlate = irq_domain_xlate_onetwocell, }; -static int __init -davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, - struct device_node *node) +static int __init davinci_cp_intc_do_init(struct resource *res, unsigned int num_irqs, + struct device_node *node) { - unsigned int num_regs = BITS_TO_LONGS(config->num_irqs); + unsigned int num_regs = BITS_TO_LONGS(num_irqs); int offset, irq_base; void __iomem *req; - req = request_mem_region(config->reg.start, - resource_size(&config->reg), - "davinci-cp-intc"); + req = request_mem_region(res->start, resource_size(res), "davinci-cp-intc"); if (!req) { pr_err("%s: register range busy\n", __func__); return -EBUSY; } - davinci_cp_intc_base = ioremap(config->reg.start, - resource_size(&config->reg)); + davinci_cp_intc_base = ioremap(res->start, resource_size(res)); if (!davinci_cp_intc_base) { pr_err("%s: unable to ioremap register range\n", __func__); return -EINVAL; @@ -184,8 +179,7 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, /* Disable system interrupts */ for (offset = 0; offset < num_regs; offset++) - davinci_cp_intc_write(~0, - DAVINCI_CP_INTC_SYS_ENABLE_CLR(offset)); + davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_ENABLE_CLR(offset)); /* Set to normal mode, no nesting, no priority hold */ davinci_cp_intc_write(0, DAVINCI_CP_INTC_CTRL); @@ -193,28 +187,25 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, /* Clear system interrupt status */ for (offset = 0; offset < num_regs; offset++) - davinci_cp_intc_write(~0, - DAVINCI_CP_INTC_SYS_STAT_CLR(offset)); + davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_STAT_CLR(offset)); /* Enable nIRQ (what about nFIQ?) */ davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET); + /* 4 channels per register */ + num_regs = (num_irqs + 3) >> 2; /* Default all priorities to channel 7. */ - num_regs = (config->num_irqs + 3) >> 2; /* 4 channels per register */ for (offset = 0; offset < num_regs; offset++) - davinci_cp_intc_write(0x07070707, - DAVINCI_CP_INTC_CHAN_MAP(offset)); + davinci_cp_intc_write(0x07070707, DAVINCI_CP_INTC_CHAN_MAP(offset)); - irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0); + irq_base = irq_alloc_descs(-1, 0, num_irqs, 0); if (irq_base < 0) { - pr_err("%s: unable to allocate interrupt descriptors: %d\n", - __func__, irq_base); + pr_err("%s: unable to allocate interrupt descriptors: %d\n", __func__, irq_base); return irq_base; } - davinci_cp_intc_irq_domain = irq_domain_add_legacy( - node, config->num_irqs, irq_base, 0, - &davinci_cp_intc_irq_domain_ops, NULL); + davinci_cp_intc_irq_domain = irq_domain_add_legacy(node, num_irqs, irq_base, 0, + &davinci_cp_intc_irq_domain_ops, NULL); if (!davinci_cp_intc_irq_domain) { pr_err("%s: unable to create an interrupt domain\n", __func__); @@ -229,31 +220,25 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, return 0; } -int __init davinci_cp_intc_init(const struct davinci_cp_intc_config *config) -{ - return davinci_cp_intc_do_init(config, NULL); -} - static int __init davinci_cp_intc_of_init(struct device_node *node, struct device_node *parent) { - struct davinci_cp_intc_config config = { }; + unsigned int num_irqs; + struct resource res; int ret; - ret = of_address_to_resource(node, 0, &config.reg); + ret = of_address_to_resource(node, 0, &res); if (ret) { - pr_err("%s: unable to get the register range from device-tree\n", - __func__); + pr_err("%s: unable to get the register range from device-tree\n", __func__); return ret; } - ret = of_property_read_u32(node, "ti,intc-size", &config.num_irqs); + ret = of_property_read_u32(node, "ti,intc-size", &num_irqs); if (ret) { - pr_err("%s: unable to read the 'ti,intc-size' property\n", - __func__); + pr_err("%s: unable to read the 'ti,intc-size' property\n", __func__); return ret; } - return davinci_cp_intc_do_init(&config, node); + return davinci_cp_intc_do_init(&res, num_irqs, node); } IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", davinci_cp_intc_of_init); |