diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_ddi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_ddi.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index cb91d07cdaa6..7f1576bfe4b0 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -34,7 +34,6 @@ #include <drm/drm_print.h> #include <drm/drm_privacy_screen_consumer.h> -#include "i915_reg.h" #include "icl_dsi.h" #include "intel_alpm.h" #include "intel_audio.h" @@ -53,6 +52,7 @@ #include "intel_display_regs.h" #include "intel_display_types.h" #include "intel_display_utils.h" +#include "intel_display_wa.h" #include "intel_dkl_phy.h" #include "intel_dkl_phy_regs.h" #include "intel_dp.h" @@ -1402,8 +1402,7 @@ static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder, int level; /* Wa_16011342517:adl-p */ - if (display->platform.alderlake_p && - IS_DISPLAY_STEP(display, STEP_A0, STEP_D0)) { + if (intel_display_wa(display, INTEL_DISPLAY_WA_16011342517)) { if ((intel_encoder_is_hdmi(encoder) && crtc_state->port_clock == 594000) || (intel_encoder_is_dp(encoder) && @@ -4247,13 +4246,15 @@ void intel_ddi_get_clock(struct intel_encoder *encoder, static void xe3plpd_ddi_get_config(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(encoder); + intel_lt_phy_pll_readout_hw_state(encoder, crtc_state, &crtc_state->dpll_hw_state.ltpll); if (crtc_state->dpll_hw_state.ltpll.tbt_mode) crtc_state->port_clock = intel_mtl_tbt_calc_port_clock(encoder); else crtc_state->port_clock = - intel_lt_phy_calc_port_clock(encoder, crtc_state); + intel_lt_phy_calc_port_clock(display, &crtc_state->dpll_hw_state.ltpll); intel_ddi_get_config(encoder, crtc_state); } @@ -4586,8 +4587,10 @@ intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state, /* * We don't enable port sync on BDW due to missing w/as and * due to not having adjusted the modeset sequence appropriately. + * From, xe3lpd onwards we have defeatured this with reference to + * Wa_16024710867 */ - if (DISPLAY_VER(display) < 9) + if (!IS_DISPLAY_VER(display, 9, 20)) return 0; if (!intel_crtc_has_type(ref_crtc_state, INTEL_OUTPUT_DP)) |