diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/bios/command_table2.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 69 |
1 files changed, 58 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c index 7d18f372ce7a..5bca5e534277 100644 --- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c @@ -101,7 +101,6 @@ static void init_dig_encoder_control(struct bios_parser *bp) bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5; break; default: - dm_output_to_console("Don't have dig_encoder_control for v%d\n", version); bp->cmd_tbl.dig_encoder_control = encoder_control_fallback; break; } @@ -210,6 +209,7 @@ static enum bp_result encoder_control_fallback( ****************************************************************************** *****************************************************************************/ + static enum bp_result transmitter_control_v1_6( struct bios_parser *bp, struct bp_transmitter_control *cntl); @@ -238,7 +238,6 @@ static void init_transmitter_control(struct bios_parser *bp) bp->cmd_tbl.transmitter_control = transmitter_control_v1_7; break; default: - dm_output_to_console("Don't have transmitter_control for v%d\n", crev); bp->cmd_tbl.transmitter_control = transmitter_control_fallback; break; } @@ -325,6 +324,21 @@ static void transmitter_control_dmcub_v1_7( dc_wake_and_execute_dmub_cmd(dmcub->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT); } +static struct dc_link *get_link_by_phy_id(struct dc *p_dc, uint32_t phy_id) +{ + struct dc_link *link = NULL; + + // Get Transition Bitmask from dc_link structure associated with PHY + for (uint8_t link_id = 0; link_id < MAX_LINKS; link_id++) { + if (phy_id == p_dc->links[link_id]->link_enc->transmitter) { + link = p_dc->links[link_id]; + break; + } + } + + return link; +} + static enum bp_result transmitter_control_v1_7( struct bios_parser *bp, struct bp_transmitter_control *cntl) @@ -357,13 +371,50 @@ static enum bp_result transmitter_control_v1_7( if (cntl->action == TRANSMITTER_CONTROL_ENABLE || cntl->action == TRANSMITTER_CONTROL_ACTIAVATE || cntl->action == TRANSMITTER_CONTROL_DEACTIVATE) { + if (dc_is_hdmi_frl_signal(cntl->signal)) + DC_LOG_BIOS("%s:dig_v1_7.symclk_units.symclk_Hz = %d\n", + __func__, dig_v1_7.symclk_units.symclk_Hz); + else DC_LOG_BIOS("%s:dig_v1_7.symclk_units.symclk_10khz = %d\n", __func__, dig_v1_7.symclk_units.symclk_10khz); } if (bp->base.ctx->dc->ctx->dmub_srv && bp->base.ctx->dc->debug.dmub_command_table) { + struct dm_process_phy_transition_init_params process_phy_transition_init_params = {0}; + struct dc_link *link = get_link_by_phy_id(bp->base.ctx->dc, dig_v1_7.phyid); + bool is_phy_transition_interlock_allowed = false; + uint8_t action = dig_v1_7.action; + + if (link) { + if (link->phy_transition_bitmask && + (action == TRANSMITTER_CONTROL_ENABLE || action == TRANSMITTER_CONTROL_DISABLE)) { + is_phy_transition_interlock_allowed = true; + + // Prepare input parameters for processing ACPI retimers + process_phy_transition_init_params.action = action; + process_phy_transition_init_params.display_port_lanes_count = cntl->lanes_number; + process_phy_transition_init_params.phy_id = dig_v1_7.phyid; + process_phy_transition_init_params.signal = cntl->signal; + process_phy_transition_init_params.sym_clock_10khz = dig_v1_7.symclk_units.symclk_10khz; + process_phy_transition_init_params.display_port_link_rate = link->cur_link_settings.link_rate; + process_phy_transition_init_params.transition_bitmask = link->phy_transition_bitmask; + process_phy_transition_init_params.hdmi_frl_num_lanes = link->frl_link_settings.frl_num_lanes; + process_phy_transition_init_params.hdmi_frl_link_rate = link->frl_link_settings.frl_link_rate; + } + dig_v1_7.skip_phy_ssc_reduction = link->wa_flags.skip_phy_ssc_reduction; + } + + // Handle PRE_OFF_TO_ON: Process ACPI PHY Transition Interlock + if (is_phy_transition_interlock_allowed && action == TRANSMITTER_CONTROL_ENABLE) + dm_acpi_process_phy_transition_interlock(bp->base.ctx, process_phy_transition_init_params); + transmitter_control_dmcub_v1_7(bp->base.ctx->dmub_srv, &dig_v1_7); + + // Handle POST_ON_TO_OFF: Process ACPI PHY Transition Interlock + if (is_phy_transition_interlock_allowed && action == TRANSMITTER_CONTROL_DISABLE) + dm_acpi_process_phy_transition_interlock(bp->base.ctx, process_phy_transition_init_params); + return BP_RESULT_OK; } @@ -408,8 +459,6 @@ static void init_set_pixel_clock(struct bios_parser *bp) bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7; break; default: - dm_output_to_console("Don't have set_pixel_clock for v%d\n", - BIOS_CMD_TABLE_PARA_REVISION(setpixelclock)); bp->cmd_tbl.set_pixel_clock = set_pixel_clock_fallback; break; } @@ -554,7 +603,6 @@ static void init_set_crtc_timing(struct bios_parser *bp) set_crtc_using_dtd_timing_v3; break; default: - dm_output_to_console("Don't have set_crtc_timing for v%d\n", dtd_version); bp->cmd_tbl.set_crtc_timing = NULL; break; } @@ -671,8 +719,6 @@ static void init_enable_crtc(struct bios_parser *bp) bp->cmd_tbl.enable_crtc = enable_crtc_v1; break; default: - dm_output_to_console("Don't have enable_crtc for v%d\n", - BIOS_CMD_TABLE_PARA_REVISION(enablecrtc)); bp->cmd_tbl.enable_crtc = NULL; break; } @@ -743,6 +789,8 @@ static enum bp_result external_encoder_control_v3( struct bios_parser *bp, struct bp_external_encoder_control *cntl) { + (void)bp; + (void)cntl; /* TODO */ return BP_RESULT_OK; } @@ -864,8 +912,6 @@ static void init_set_dce_clock(struct bios_parser *bp) bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1; break; default: - dm_output_to_console("Don't have set_dce_clock for v%d\n", - BIOS_CMD_TABLE_PARA_REVISION(setdceclock)); bp->cmd_tbl.set_dce_clock = NULL; break; } @@ -889,8 +935,8 @@ static enum bp_result set_dce_clock_v2_1( &atom_clock_type)) return BP_RESULT_BADINPUT; - params.param.dceclksrc = atom_pll_id; - params.param.dceclktype = atom_clock_type; + params.param.dceclksrc = (uint8_t)atom_pll_id; + params.param.dceclktype = (uint8_t)atom_clock_type; if (bp_params->clock_type == DCECLOCK_TYPE_DPREFCLK) { if (bp_params->flags.USE_GENLOCK_AS_SOURCE_FOR_DPREFCLK) @@ -1046,3 +1092,4 @@ void dal_firmware_parser_init_cmd_tbl(struct bios_parser *bp) init_enable_lvtma_control(bp); } + |