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path: root/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/bios/bios_parser.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/bios_parser.c42
1 files changed, 3 insertions, 39 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index 507b628abdb5..fb30a3e5dfdb 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -807,8 +807,8 @@ static enum bp_result bios_parser_dac_load_detection(
uint32_t bios_0_scratch;
uint32_t device_id_mask = 0;
- bp_params.device_id = get_support_mask_for_device_id(
- DEVICE_TYPE_CRT, engine_id == ENGINE_ID_DACB ? 2 : 1);
+ bp_params.device_id = (uint16_t)get_support_mask_for_device_id(
+ DEVICE_TYPE_CRT, engine_id == ENGINE_ID_DACB ? 2 : 1);
if (bp_params.device_id == ATOM_DEVICE_CRT1_SUPPORT)
device_id_mask = ATOM_S0_CRT1_MASK;
@@ -1448,7 +1448,7 @@ static enum bp_result get_embedded_panel_info_v1_2(
info->ss_id = lvds->ucSS_Id;
{
- uint8_t rr = le16_to_cpu(lvds->usSupportedRefreshRate);
+ uint16_t rr = le16_to_cpu(lvds->usSupportedRefreshRate);
/* Get minimum supported refresh rate*/
if (SUPPORTED_LCD_REFRESHRATE_30Hz & rr)
info->supported_rr.REFRESH_RATE_30HZ = 1;
@@ -2423,15 +2423,6 @@ static enum bp_result get_integrated_info_v8(
info->dentist_vco_freq = le32_to_cpu(info_v8->ulDentistVCOFreq) * 10;
info->boot_up_uma_clock = le32_to_cpu(info_v8->ulBootUpUMAClock) * 10;
- for (i = 0; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
- /* Convert [10KHz] into [KHz] */
- info->disp_clk_voltage[i].max_supported_clk =
- le32_to_cpu(info_v8->sDISPCLK_Voltage[i].
- ulMaximumSupportedCLK) * 10;
- info->disp_clk_voltage[i].voltage_index =
- le32_to_cpu(info_v8->sDISPCLK_Voltage[i].ulVoltageIndex);
- }
-
info->boot_up_req_display_vector =
le32_to_cpu(info_v8->ulBootUpReqDisplayVector);
info->gpu_cap_info =
@@ -2574,14 +2565,6 @@ static enum bp_result get_integrated_info_v9(
info->dentist_vco_freq = le32_to_cpu(info_v9->ulDentistVCOFreq) * 10;
info->boot_up_uma_clock = le32_to_cpu(info_v9->ulBootUpUMAClock) * 10;
- for (i = 0; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
- /* Convert [10KHz] into [KHz] */
- info->disp_clk_voltage[i].max_supported_clk =
- le32_to_cpu(info_v9->sDISPCLK_Voltage[i].ulMaximumSupportedCLK) * 10;
- info->disp_clk_voltage[i].voltage_index =
- le32_to_cpu(info_v9->sDISPCLK_Voltage[i].ulVoltageIndex);
- }
-
info->boot_up_req_display_vector =
le32_to_cpu(info_v9->ulBootUpReqDisplayVector);
info->gpu_cap_info = le32_to_cpu(info_v9->ulGPUCapInfo);
@@ -2723,25 +2706,6 @@ static enum bp_result construct_integrated_info(
}
}
- /* Sort voltage table from low to high*/
- if (result == BP_RESULT_OK) {
- int32_t i;
- int32_t j;
-
- for (i = 1; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
- for (j = i; j > 0; --j) {
- if (
- info->disp_clk_voltage[j].max_supported_clk <
- info->disp_clk_voltage[j-1].max_supported_clk) {
- /* swap j and j - 1*/
- swap(info->disp_clk_voltage[j - 1],
- info->disp_clk_voltage[j]);
- }
- }
- }
-
- }
-
return result;
}