diff options
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts | 78 |
1 files changed, 76 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts index bc4077575beb..d6b62cd1b90b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts @@ -9,6 +9,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> #include <dt-bindings/usb/pd.h> #include "rk3588s.dtsi" @@ -238,11 +239,47 @@ status = "okay"; }; +&edp0 { + force-hpd; + status = "okay"; + + aux-bus { + panel { + compatible = "edp-panel"; + backlight = <&backlight>; + power-supply = <&vcc3v3_lcd_edp>; + no-hpd; + + port { + panel_in_edp: endpoint { + remote-endpoint = <&edp_out_panel>; + }; + }; + }; + }; +}; + +&edp0_in { + edp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_edp0>; + }; +}; + +&edp0_out { + edp_out_panel: endpoint { + remote-endpoint = <&panel_in_edp>; + }; +}; + +&hdptxphy0 { + status = "okay"; +}; + &i2c3 { status = "okay"; es8388: audio-codec@11 { - compatible = "everest,es8388"; + compatible = "everest,es8388", "everest,es8328"; reg = <0x11>; clocks = <&cru I2S0_8CH_MCLKOUT>; assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; @@ -340,6 +377,26 @@ status = "okay"; }; +&pd_gpu { + domain-supply = <&vdd_gpu_s0>; +}; + +&pd_rkvdec0 { + domain-supply = <&vdd_vdenc_s0>; +}; + +&pd_rkvdec1 { + domain-supply = <&vdd_vdenc_s0>; +}; + +&pd_venc0 { + domain-supply = <&vdd_vdenc_s0>; +}; + +&pd_venc1 { + domain-supply = <&vdd_vdenc_s0>; +}; + &pinctrl { audio { hp_detect: headphone-detect { @@ -399,6 +456,7 @@ }; &pwm12 { + pinctrl-0 = <&pwm12m1_pins>; status = "okay"; }; @@ -423,7 +481,6 @@ cap-sd-highspeed; cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; disable-wp; - max-frequency = <150000000>; no-mmc; no-sdio; sd-uhs-sdr104; @@ -1168,3 +1225,20 @@ }; }; }; + +&vop_mmu { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>; + status = "okay"; +}; + +&vp2 { + vp2_out_edp0: endpoint@ROCKCHIP_VOP2_EP_EDP0 { + reg = <ROCKCHIP_VOP2_EP_EDP0>; + remote-endpoint = <&edp0_in_vp2>; + }; +}; |
