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Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra234.dtsi')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra234.dtsi123
1 files changed, 100 insertions, 23 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 984c85eab41a..04a95b6658ca 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/power/tegra234-powergate.h>
#include <dt-bindings/reset/tegra234-reset.h>
#include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
/ {
compatible = "nvidia,tegra234";
@@ -16,6 +17,18 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ i2c0 = &gen1_i2c;
+ i2c1 = &gen2_i2c;
+ i2c2 = &cam_i2c;
+ i2c3 = &dp_aux_ch1_i2c;
+ i2c4 = &bpmp_i2c;
+ i2c5 = &dp_aux_ch0_i2c;
+ i2c6 = &dp_aux_ch2_i2c;
+ i2c7 = &gen8_i2c;
+ i2c8 = &dp_aux_ch3_i2c;
+ };
+
bus@0 {
compatible = "simple-bus";
@@ -27,7 +40,6 @@
compatible = "nvidia,tegra234-misc";
reg = <0x0 0x00100000 0x0 0xf000>,
<0x0 0x0010f000 0x0 0x1000>;
- status = "okay";
};
timer@2080000 {
@@ -49,7 +61,6 @@
<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
};
gpio: gpio@2200000 {
@@ -115,6 +126,56 @@
pinmux: pinmux@2430000 {
compatible = "nvidia,tegra234-pinmux";
reg = <0x0 0x2430000 0x0 0x19100>;
+
+ pex_rst_c4_in_state: pinmux-pex-rst-c4-in {
+ pex_rst {
+ nvidia,pins = "pex_l4_rst_n_pl1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+
+ pex_rst_c5_in_state: pinmux-pex-rst-c5-in {
+ pex_rst {
+ nvidia,pins = "pex_l5_rst_n_paf1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+
+ pex_rst_c6_in_state: pinmux-pex-rst-c6-in {
+ pex_rst {
+ nvidia,pins = "pex_l6_rst_n_paf3";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+
+ pex_rst_c7_in_state: pinmux-pex-rst-c7-in {
+ pex_rst {
+ nvidia,pins = "pex_l7_rst_n_pag1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+
+ pex_rst_c10_in_state: pinmux-pex-rst-c10-in {
+ pex_rst {
+ nvidia,pins = "pex_l10_rst_n_pag7";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
};
gpcdma: dma-controller@2600000 {
@@ -2717,7 +2778,6 @@
"ch11", "ch12", "ch13", "ch14", "ch15";
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
#interconnect-cells = <1>;
- status = "okay";
#address-cells = <2>;
#size-cells = <2>;
@@ -2749,7 +2809,6 @@
interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA234_CLK_EMC>;
clock-names = "emc";
- status = "okay";
#interconnect-cells = <0>;
@@ -2948,6 +3007,11 @@
<&bpmp TEGRA234_CLK_QSPI0_PM>;
clock-names = "qspi", "qspi_out";
resets = <&bpmp TEGRA234_RESET_QSPI0>;
+ iommus = <&smmu_niso1 TEGRA234_SID_QSPI0>;
+ assigned-clocks = <&bpmp TEGRA234_CLK_QSPI0_2X_PM>,
+ <&bpmp TEGRA234_CLK_QSPI0_PM>;
+ assigned-clock-rates = <199999999 99999999>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>;
status = "disabled";
};
@@ -3031,6 +3095,11 @@
<&bpmp TEGRA234_CLK_QSPI1_PM>;
clock-names = "qspi", "qspi_out";
resets = <&bpmp TEGRA234_RESET_QSPI1>;
+ iommus = <&smmu_niso1 TEGRA234_SID_QSPI1>;
+ assigned-clocks = <&bpmp TEGRA234_CLK_QSPI1_2X_PM>,
+ <&bpmp TEGRA234_CLK_QSPI1_PM>;
+ assigned-clock-rates = <199999999 99999999>;
+ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>;
status = "disabled";
};
@@ -3254,8 +3323,15 @@
<0x0 0x03650000 0x0 0x10000>;
reg-names = "hcd", "fpci", "bar2";
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
+ <&pmc 76 IRQ_TYPE_LEVEL_HIGH>,
+ <&pmc 77 IRQ_TYPE_LEVEL_HIGH>,
+ <&pmc 78 IRQ_TYPE_LEVEL_HIGH>,
+ <&pmc 79 IRQ_TYPE_LEVEL_HIGH>,
+ <&pmc 80 IRQ_TYPE_LEVEL_HIGH>,
+ <&pmc 81 IRQ_TYPE_LEVEL_HIGH>,
+ <&pmc 82 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
<&bpmp TEGRA234_CLK_XUSB_FALCON>,
@@ -3545,7 +3621,7 @@
snps,axi-config = <&mgbe0_axi_setup>;
mgbe0_axi_setup: stmmac-axi-config {
- snps,blen = <256 128 64 32>;
+ snps,blen = <256 128 64 32 0 0 0>;
snps,rd_osr_lmt = <63>;
snps,wr_osr_lmt = <63>;
};
@@ -3587,7 +3663,7 @@
snps,axi-config = <&mgbe1_axi_setup>;
mgbe1_axi_setup: stmmac-axi-config {
- snps,blen = <256 128 64 32>;
+ snps,blen = <256 128 64 32 0 0 0>;
snps,rd_osr_lmt = <63>;
snps,wr_osr_lmt = <63>;
};
@@ -3629,7 +3705,7 @@
snps,axi-config = <&mgbe2_axi_setup>;
mgbe2_axi_setup: stmmac-axi-config {
- snps,blen = <256 128 64 32>;
+ snps,blen = <256 128 64 32 0 0 0>;
snps,rd_osr_lmt = <63>;
snps,wr_osr_lmt = <63>;
};
@@ -3808,21 +3884,19 @@
#iommu-cells = <1>;
nvidia,memory-controller = <&mc>;
- status = "okay";
};
sce-fabric@b600000 {
compatible = "nvidia,tegra234-sce-fabric";
reg = <0x0 0xb600000 0x0 0x40000>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
+ status = "disabled";
};
rce-fabric@be00000 {
compatible = "nvidia,tegra234-rce-fabric";
reg = <0x0 0xbe00000 0x0 0x40000>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
};
hsp_aon: hsp@c150000 {
@@ -3900,7 +3974,7 @@
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
resets = <&bpmp TEGRA234_RESET_SPI2>;
reset-names = "spi";
- dmas = <&gpcdma 19>, <&gpcdma 19>;
+ dmas = <&gpcdma 16>, <&gpcdma 16>;
dma-names = "rx", "tx";
dma-coherent;
status = "disabled";
@@ -3984,28 +4058,24 @@
compatible = "nvidia,tegra234-aon-fabric";
reg = <0x0 0xc600000 0x0 0x40000>;
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
};
bpmp-fabric@d600000 {
compatible = "nvidia,tegra234-bpmp-fabric";
reg = <0x0 0xd600000 0x0 0x40000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
};
dce-fabric@de00000 {
- compatible = "nvidia,tegra234-sce-fabric";
+ compatible = "nvidia,tegra234-dce-fabric";
reg = <0x0 0xde00000 0x0 0x40000>;
interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
};
ccplex@e000000 {
compatible = "nvidia,tegra234-ccplex-cluster";
reg = <0x0 0x0e000000 0x0 0x5ffff>;
nvidia,bpmp = <&bpmp>;
- status = "okay";
};
gic: interrupt-controller@f400000 {
@@ -4018,6 +4088,8 @@
#redistributor-regions = <1>;
#interrupt-cells = <3>;
interrupt-controller;
+
+ #address-cells = <0>;
};
smmu_iso: iommu@10000000 {
@@ -4157,7 +4229,6 @@
#iommu-cells = <1>;
nvidia,memory-controller = <&mc>;
- status = "okay";
};
smmu_niso0: iommu@12000000 {
@@ -4299,14 +4370,12 @@
#iommu-cells = <1>;
nvidia,memory-controller = <&mc>;
- status = "okay";
};
cbb-fabric@13a00000 {
compatible = "nvidia,tegra234-cbb-fabric";
reg = <0x0 0x13a00000 0x0 0x400000>;
interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
};
host1x@13e00000 {
@@ -4606,6 +4675,8 @@
<&bpmp TEGRA234_RESET_PEX2_CORE_10>;
reset-names = "apb", "core";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pex_rst_c10_in_state>;
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
interrupt-names = "intr";
@@ -4857,6 +4928,8 @@
<&bpmp TEGRA234_RESET_PEX0_CORE_4>;
reset-names = "apb", "core";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pex_rst_c4_in_state>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
interrupt-names = "intr";
nvidia,bpmp = <&bpmp 4>;
@@ -4999,6 +5072,8 @@
<&bpmp TEGRA234_RESET_PEX1_CORE_5>;
reset-names = "apb", "core";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pex_rst_c5_in_state>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
interrupt-names = "intr";
@@ -5091,6 +5166,8 @@
<&bpmp TEGRA234_RESET_PEX1_CORE_6>;
reset-names = "apb", "core";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pex_rst_c6_in_state>;
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
interrupt-names = "intr";
@@ -5183,6 +5260,8 @@
<&bpmp TEGRA234_RESET_PEX2_CORE_7>;
reset-names = "apb", "core";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pex_rst_c7_in_state>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
interrupt-names = "intr";
@@ -5712,12 +5791,10 @@
pmu {
compatible = "arm,cortex-a78-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
};
psci {
compatible = "arm,psci-1.0";
- status = "okay";
method = "smc";
};