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Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra194.dtsi')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra194.dtsi46
1 files changed, 18 insertions, 28 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 33f92b77cd9d..849694f751d9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -97,7 +97,6 @@
<GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
nvidia,axi2apb = <&axi2apb>;
nvidia,apbmisc = <&apbmisc>;
- status = "okay";
};
axi2apb: axi2apb@2390000 {
@@ -108,13 +107,11 @@
<0x0 0x23c0000 0x0 0x1000>,
<0x0 0x23d0000 0x0 0x1000>,
<0x0 0x23e0000 0x0 0x1000>;
- status = "okay";
};
pinmux: pinmux@2430000 {
compatible = "nvidia,tegra194-pinmux";
reg = <0x0 0x2430000 0x0 0x17000>;
- status = "okay";
pex_clkreq_c5_bi_dir_state: pinmux-pex-clkreq-c5-bi-dir {
clkreq {
@@ -208,7 +205,6 @@
iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
dma-coherent;
dma-channel-mask = <0xfffffffe>;
- status = "okay";
};
aconnect@2900000 {
@@ -737,7 +733,6 @@
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- status = "okay";
};
uarta: serial@3100000 {
@@ -747,6 +742,8 @@
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTA>;
resets = <&bpmp TEGRA194_RESET_UARTA>;
+ dmas = <&gpcdma 8>, <&gpcdma 8>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -757,6 +754,8 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTB>;
resets = <&bpmp TEGRA194_RESET_UARTB>;
+ dmas = <&gpcdma 9>, <&gpcdma 9>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -766,9 +765,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTD>;
- clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTD>;
- reset-names = "serial";
+ dmas = <&gpcdma 19>, <&gpcdma 19>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -778,9 +777,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTE>;
- clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTE>;
- reset-names = "serial";
+ dmas = <&gpcdma 20>, <&gpcdma 20>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -790,9 +789,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTF>;
- clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTF>;
- reset-names = "serial";
+ dmas = <&gpcdma 12>, <&gpcdma 12>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -817,9 +816,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTH>;
- clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTH>;
- reset-names = "serial";
+ dmas = <&gpcdma 13>, <&gpcdma 13>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1327,6 +1326,7 @@
gic: interrupt-controller@3881000 {
compatible = "arm,gic-400";
+ #address-cells = <0>;
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x03881000 0x0 0x1000>,
@@ -1339,7 +1339,7 @@
};
cec@3960000 {
- compatible = "nvidia,tegra194-cec";
+ compatible = "nvidia,tegra194-cec", "nvidia,tegra210-cec";
reg = <0x0 0x03960000 0x0 0x10000>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_CEC>;
@@ -1354,7 +1354,6 @@
nvidia,int-threshold = <1>;
nvidia,slices = <11>;
#timestamp-cells = <1>;
- status = "okay";
};
hsp_top0: hsp@3c00000 {
@@ -1542,7 +1541,6 @@
<GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
nvidia,axi2apb = <&axi2apb>;
nvidia,apbmisc = <&apbmisc>;
- status = "okay";
};
rce-noc@be00000 {
@@ -1552,7 +1550,6 @@
<GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
nvidia,axi2apb = <&axi2apb>;
nvidia,apbmisc = <&apbmisc>;
- status = "okay";
};
hsp_aon: hsp@c150000 {
@@ -1577,7 +1574,6 @@
nvidia,int-threshold = <1>;
nvidia,slices = <3>;
#timestamp-cells = <1>;
- status = "okay";
};
gen2_i2c: i2c@c240000 {
@@ -1616,9 +1612,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTC>;
- clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTC>;
- reset-names = "serial";
+ dmas = <&gpcdma 3>, <&gpcdma 3>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1628,9 +1624,9 @@
reg-shift = <2>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTG>;
- clock-names = "serial";
resets = <&bpmp TEGRA194_RESET_UARTG>;
- reset-names = "serial";
+ dmas = <&gpcdma 2>, <&gpcdma 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -1663,8 +1659,6 @@
pinmux_aon: pinmux@c300000 {
compatible = "nvidia,tegra194-pinmux-aon";
reg = <0x0 0xc300000 0x0 0x4000>;
-
- status = "okay";
};
pwm4: pwm@c340000 {
@@ -1717,7 +1711,6 @@
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
nvidia,apbmisc = <&apbmisc>;
- status = "okay";
};
bpmp-noc@d600000 {
@@ -1727,7 +1720,6 @@
<GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
nvidia,axi2apb = <&axi2apb>;
nvidia,apbmisc = <&apbmisc>;
- status = "okay";
};
iommu@10000000 {
@@ -1881,7 +1873,6 @@
#iommu-cells = <1>;
nvidia,memory-controller = <&mc>;
- status = "okay";
};
host1x@13e00000 {
@@ -3101,7 +3092,6 @@
psci {
compatible = "arm,psci-1.0";
- status = "okay";
method = "smc";
};