diff options
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index a24adba201af..b3fb1e0ee796 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -23,6 +23,7 @@ device_type = "cpu"; reg = <0x0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu1: cpu@1 { @@ -30,6 +31,7 @@ device_type = "cpu"; reg = <0x1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu2: cpu@2 { @@ -37,6 +39,7 @@ device_type = "cpu"; reg = <0x2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu3: cpu@3 { @@ -44,6 +47,7 @@ device_type = "cpu"; reg = <0x3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; }; @@ -175,6 +179,10 @@ ths_calibration: calib@14 { reg = <0x14 8>; }; + + cpu_speed_grade: cpu-speed-grade@1c { + reg = <0x1c 0x2>; + }; }; watchdog@30090a0 { @@ -228,6 +236,21 @@ bias-pull-up; }; + rgmii0_pins: rgmii0-pins { + pins = "PH0", "PH1", "PH2", "PH3", "PH4", + "PH5", "PH6", "PH7", "PH9", "PH10", + "PH14", "PH15", "PH16", "PH17", "PH18"; + function = "emac0"; + drive-strength = <40>; + }; + + rmii0_pins: rmii0-pins { + pins = "PH0", "PH1", "PH2", "PH3", "PH4", + "PH5", "PH6", "PH7", "PH9", "PH10"; + function = "emac0"; + drive-strength = <40>; + }; + uart0_pb_pins: uart0-pb-pins { pins = "PB9", "PB10"; function = "uart0"; @@ -244,6 +267,7 @@ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -259,6 +283,7 @@ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -274,6 +299,7 @@ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -394,6 +420,40 @@ #size-cells = <0>; }; + ledc: led-controller@5018000 { + compatible = "allwinner,sun50i-a100-ledc"; + reg = <0x5018000 0x400>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_LEDC>, <&ccu CLK_LEDC>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_LEDC>; + dmas = <&dma 42>; + dma-names = "tx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + emac0: ethernet@5020000 { + compatible = "allwinner,sun50i-a100-emac", + "allwinner,sun50i-a64-emac"; + reg = <0x5020000 0x10000>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "stmmaceth"; + syscon = <&syscon>; + status = "disabled"; + + mdio0: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + ths: thermal-sensor@5070400 { compatible = "allwinner,sun50i-a100-ths"; reg = <0x05070400 0x100>; |