diff options
Diffstat (limited to 'arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi index 45bcfd7faf9d..4dc2c410cf61 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -54,23 +54,35 @@ }; clocks { - ckil { + ckil: ckil { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; }; - ckih1 { + ckih1: ckih1 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; - osc { + osc: osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; }; + + anaclk1: anaclk1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + anaclk2: anaclk2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; }; ldb: ldb { @@ -149,6 +161,7 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; + bootph-all; dma_apbh: dma-controller@110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; @@ -166,6 +179,8 @@ compatible = "fsl,imx6q-gpmi-nand"; reg = <0x00112000 0x2000>, <0x00114000 0x2000>; reg-names = "gpmi-nand", "bch"; + #address-cells = <1>; + #size-cells = <0>; interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "bch"; clocks = <&clks IMX6QDL_CLK_GPMI_IO>, @@ -295,6 +310,7 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; + bootph-pre-ram; spba-bus@2000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -302,6 +318,7 @@ #size-cells = <1>; reg = <0x02000000 0x40000>; ranges; + bootph-pre-ram; spdif: spdif@2004000 { compatible = "fsl,imx35-spdif"; @@ -875,6 +892,7 @@ gpc: gpc@20dc000 { compatible = "fsl,imx6q-gpc"; reg = <0x020dc000 0x4000>; + #address-cells = <0>; interrupt-controller; #interrupt-cells = <3>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; @@ -917,6 +935,7 @@ iomuxc: pinctrl@20e0000 { compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; reg = <0x20e0000 0x4000>; + bootph-pre-ram; }; dcic1: dcic@20e4000 { @@ -947,6 +966,7 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; + bootph-pre-ram; crypto: crypto@2100000 { compatible = "fsl,sec-v4.0"; @@ -1317,6 +1337,7 @@ <&clks IMX6QDL_CLK_IPU1_DI1>; clock-names = "bus", "di0", "di1"; resets = <&src 2>; + bootph-all; ipu1_csi0: port@0 { reg = <0>; |