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| author | Hans de Goede <hdegoede@redhat.com> | 2017-07-08 15:40:08 +0200 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2017-07-24 22:43:17 +0200 |
| commit | 58eefe2f3f53f294cdb5a2b6121973b5ae508f01 (patch) | |
| tree | 6cf04e64bddbb11db572a0f68f8d112188466f0b /usr | |
| parent | 520eccdfe187591a51ea9ab4c1a024ae4d0f68d9 (diff) | |
| download | lwn-58eefe2f3f53f294cdb5a2b6121973b5ae508f01.tar.gz lwn-58eefe2f3f53f294cdb5a2b6121973b5ae508f01.zip | |
ACPI / PMIC: xpower: Do pinswitch magic when reading GPADC
Testing has shown that the TS-pin's bias-current needs to be disabled
when reading the GPIO0 pin in GPADC mode.
It seems that there is only 1 bias current source and to be able to use it
for the GPIO0 pin in GPADC mode it must be temporarily turned off for the
TS pin, but the datasheet does not mention this.
This commit adds the necessary writes to turn the TS pin BIAS current
off before and back on after reading the GPADC. This fixes the GPADC
always returning a reading of 0.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'usr')
0 files changed, 0 insertions, 0 deletions