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| author | Markuss Broks <markuss.broks@gmail.com> | 2026-08-20 22:12:08 +0300 |
|---|---|---|
| committer | Joerg Roedel <joerg.roedel@amd.com> | 2026-09-24 13:18:03 +0200 |
| commit | 25e8d16a9c9639c34e665d9b01027d77b5fd08f7 (patch) | |
| tree | 2b2330e3f5d74c15d2bc2d3cbdf3bed3b03ee5ba /tools/perf/scripts/python | |
| parent | e29fd6f4f0fcd07556a71aa74dbe17d37a36b818 (diff) | |
| download | lwn-25e8d16a9c9639c34e665d9b01027d77b5fd08f7.tar.gz lwn-25e8d16a9c9639c34e665d9b01027d77b5fd08f7.zip | |
iommu/exynos: decode the v7 fault transaction info
The v7+ fault registers carry a transaction-info word alongside the
faulting address, but it is only used to derive the read/write
direction and then thrown away. Keep it and print it: AxID identifies
which port inside the master issued the faulting transaction, which is
the only way to tell apart the several DMA engines a single block can
contain, and the remaining bits of the raw word are implementation
defined and worth having in a fault report.
Define the known fields of the word instead of open-coding the masks;
this also names the direction bit the driver was already testing as a
bare BIT(20).
Gate the print on the variant having a fault_info register, so older
SysMMUs are unaffected.
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
