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| author | Takashi Iwai <tiwai@suse.de> | 2008-07-15 16:28:43 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2008-07-16 12:03:24 +0200 |
| commit | e785d3d8fb5fab744d67fac9966229bcdc52db45 (patch) | |
| tree | f64a4f3420b62410746f7fae63cb07463340e9db /sound | |
| parent | 2b30a55d4d09254d6b25814bf6ac0b7843afdc99 (diff) | |
| download | lwn-e785d3d8fb5fab744d67fac9966229bcdc52db45.tar.gz lwn-e785d3d8fb5fab744d67fac9966229bcdc52db45.zip | |
ALSA: hda - Align BDL position adjustment parameter
It seems NVidia and other hardwares require the alignment for period
update timing. For satisfying this condition, align the position
adjustment for delayed wake-up to the initial bdl_pos_adj value.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/pci/hda/hda_intel.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 16715a68ba5e..ef9f072b47fc 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -1047,9 +1047,13 @@ static int azx_setup_periods(struct azx *chip, pos_adj = bdl_pos_adj[chip->dev_index]; if (pos_adj > 0) { struct snd_pcm_runtime *runtime = substream->runtime; + int pos_align = pos_adj; pos_adj = (pos_adj * runtime->rate + 47999) / 48000; if (!pos_adj) - pos_adj = 1; + pos_adj = pos_align; + else + pos_adj = ((pos_adj + pos_align - 1) / pos_align) * + pos_align; pos_adj = frames_to_bytes(runtime, pos_adj); if (pos_adj >= period_bytes) { snd_printk(KERN_WARNING "Too big adjustment %d\n", |