diff options
| author | Shuming Fan <shumingf@realtek.com> | 2019-10-16 16:57:54 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-10-16 13:55:43 +0100 |
| commit | 81bd644f69858c233245588f18b88bdcd62efd1e (patch) | |
| tree | ebf233aea617a1fe1b7100508acc2883bb18b7b3 /sound/soc/codecs/rt1011.h | |
| parent | a35716a95655d8fc15042c9d574374eceb9daf3d (diff) | |
| download | lwn-81bd644f69858c233245588f18b88bdcd62efd1e.tar.gz lwn-81bd644f69858c233245588f18b88bdcd62efd1e.zip | |
ASoC: rt1011: set tx/rx slots from tx/rx_mask in TDM case
The TX/RX slot configuration use tx/rx_mask which requested
by the machine driver.
Signed-off-by: Shuming Fan <shumingf@realtek.com>
Link: https://lore.kernel.org/r/20191016085754.11614-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/rt1011.h')
| -rw-r--r-- | sound/soc/codecs/rt1011.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt1011.h b/sound/soc/codecs/rt1011.h index 2d65983f3d0f..3f7dea1191ad 100644 --- a/sound/soc/codecs/rt1011.h +++ b/sound/soc/codecs/rt1011.h @@ -460,6 +460,23 @@ #define RT1011_TDM_I2S_DOCK_EN_1_MASK (0x1 << 3) #define RT1011_TDM_I2S_DOCK_EN_1_SFT 3 #define RT1011_TDM_I2S_DOCK_EN_1 (0x1 << 3) +#define RT1011_TDM_ADCDAT1_DATA_LOCATION (0x7 << 0) + +/* TDM1 Setting-3 (0x0118) */ +#define RT1011_TDM_I2S_RX_ADC1_1_MASK (0x3 << 6) +#define RT1011_TDM_I2S_RX_ADC2_1_MASK (0x3 << 4) +#define RT1011_TDM_I2S_RX_ADC3_1_MASK (0x3 << 2) +#define RT1011_TDM_I2S_RX_ADC4_1_MASK (0x3 << 0) +#define RT1011_TDM_I2S_RX_ADC1_1_LL (0x2 << 6) +#define RT1011_TDM_I2S_RX_ADC2_1_LL (0x2 << 4) +#define RT1011_TDM_I2S_RX_ADC3_1_LL (0x2 << 2) +#define RT1011_TDM_I2S_RX_ADC4_1_LL (0x2 << 0) + +/* TDM1 Setting-4 (0x011a) */ +#define RT1011_TDM_I2S_TX_L_DAC1_1_MASK (0x7 << 12) +#define RT1011_TDM_I2S_TX_R_DAC1_1_MASK (0x7 << 8) +#define RT1011_TDM_I2S_TX_L_DAC1_1_SFT 12 +#define RT1011_TDM_I2S_TX_R_DAC1_1_SFT 8 /* TDM2 Setting-2 (0x0120) */ #define RT1011_TDM_I2S_DOCK_ADCDAT_LEN_2_MASK (0x7 << 13) @@ -585,6 +602,12 @@ #define RT1011_STP_T0_EN_BIT 6 #define RT1011_STP_T0_EN (0x1 << 6) +/* Cross Biquad Setting-1 (0x0702) */ +#define RT1011_MONO_LR_SEL_MASK (0x3 << 5) +#define RT1011_MONO_L_CHANNEL (0x0 << 5) +#define RT1011_MONO_R_CHANNEL (0x1 << 5) +#define RT1011_MONO_LR_MIX_CHANNEL (0x2 << 5) + /* ClassD Internal Setting-1 (0x1300) */ #define RT1011_DRIVER_READY_SPK (0x1 << 12) #define RT1011_DRIVER_READY_SPK_BIT 12 |