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authorCsókás, Bence <csokas.bence@prolan.hu>2024-09-24 11:37:06 +0200
committerPaolo Abeni <pabeni@redhat.com>2024-10-01 11:21:12 +0200
commitd9335d0232d2da605585eea1518ac6733518f938 (patch)
treec56cd5bf2d916a9f9459f6c0dcb49d041c391911 /scripts/spdxcheck-test.sh
parenta1477dc87dc4996dcf65a4893d4e2c3a6b593002 (diff)
downloadlwn-d9335d0232d2da605585eea1518ac6733518f938.tar.gz
lwn-d9335d0232d2da605585eea1518ac6733518f938.zip
net: fec: Reload PTP registers after link-state change
On link-state change, the controller gets reset, which clears all PTP registers, including PHC time, calibrated clock correction values etc. For correct IEEE 1588 operation we need to restore these after the reset. Fixes: 6605b730c061 ("FEC: Add time stamping code and a PTP hardware clock") Signed-off-by: Csókás, Bence <csokas.bence@prolan.hu> Reviewed-by: Wei Fang <wei.fang@nxp.com> Link: https://patch.msgid.link/20240924093705.2897329-2-csokas.bence@prolan.hu Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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