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authorKartik <kkartik@nvidia.com>2022-11-09 19:50:22 +0530
committerThierry Reding <treding@nvidia.com>2022-11-11 15:00:07 +0100
commitbebf683ba6829f544011411580bcd620b7581087 (patch)
tree899251a3ea8c2fad6af16f253784d86cf15f06b6 /include/soc
parent0474cc8489bda9a8cd6a10252e7e6af29c849438 (diff)
downloadlwn-bebf683ba6829f544011411580bcd620b7581087.tar.gz
lwn-bebf683ba6829f544011411580bcd620b7581087.zip
soc/tegra: fuse: Use platform info with SoC revision
Tegra pre-silicon platforms do not have chip revisions. This makes the revision SoC attribute meaningless on these platforms. Instead, populate the revision SoC attribute with a combination of the platform name and the chip revision for silicon platforms, and simply with the platform name on pre-silicon platforms. Signed-off-by: Kartik <kkartik@nvidia.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc')
-rw-r--r--include/soc/tegra/fuse.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index 977c334136e9..a63de5da8124 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -34,6 +34,20 @@ enum tegra_revision {
TEGRA_REVISION_MAX,
};
+enum tegra_platform {
+ TEGRA_PLATFORM_SILICON = 0,
+ TEGRA_PLATFORM_QT,
+ TEGRA_PLATFORM_SYSTEM_FPGA,
+ TEGRA_PLATFORM_UNIT_FPGA,
+ TEGRA_PLATFORM_ASIM_QT,
+ TEGRA_PLATFORM_ASIM_LINSIM,
+ TEGRA_PLATFORM_DSIM_ASIM_LINSIM,
+ TEGRA_PLATFORM_VERIFICATION_SIMULATION,
+ TEGRA_PLATFORM_VDK,
+ TEGRA_PLATFORM_VSP,
+ TEGRA_PLATFORM_MAX,
+};
+
struct tegra_sku_info {
int sku_id;
int cpu_process_id;
@@ -47,6 +61,7 @@ struct tegra_sku_info {
int gpu_speedo_id;
int gpu_speedo_value;
enum tegra_revision revision;
+ enum tegra_platform platform;
};
#ifdef CONFIG_ARCH_TEGRA