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| author | Dave Jiang <dave.jiang@intel.com> | 2024-05-02 09:57:33 -0700 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2024-05-08 13:25:43 -0500 |
| commit | 53c49b6e6dd2ebc1d3257ae838e067699229bc8d (patch) | |
| tree | 38fef0ebcfe00b0a7043689b7798b5f2d44478ba /include/linux/pci.h | |
| parent | b1956e2d0713e210a56ae65ad3488ae36f833e76 (diff) | |
| download | lwn-53c49b6e6dd2ebc1d3257ae838e067699229bc8d.tar.gz lwn-53c49b6e6dd2ebc1d3257ae838e067699229bc8d.zip | |
PCI/CXL: Add 'cxl_bus' reset method for devices below CXL Ports
By default Secondary Bus Reset (SBR) is masked for CXL Ports (see CXL r3.1,
sec 8.1.5.2).
Add cxl_reset_bus_function() (method "cxl_bus") to set the "Unmask SBR" bit
in the upstream CXL Port before performing the bus reset and restore the
original value afterwards.
This method allows the user to perform a bus reset on a CXL device without
needing to set the "Unmask SBR" bit via a user tool.
Link: https://lore.kernel.org/r/20240502165851.1948523-5-dave.jiang@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
[bhelgaas: simplify commit log, invert condition to avoid negation]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'include/linux/pci.h')
| -rw-r--r-- | include/linux/pci.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index e4e7b175af54..b06c1c0ec9bd 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -51,7 +51,7 @@ PCI_STATUS_PARITY) /* Number of reset methods used in pci_reset_fn_methods array in pci.c */ -#define PCI_NUM_RESET_METHODS 7 +#define PCI_NUM_RESET_METHODS 8 #define PCI_RESET_PROBE true #define PCI_RESET_DO_RESET false |