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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2026-05-26 16:56:29 +0200 |
|---|---|---|
| committer | Pratyush Yadav <pratyush@kernel.org> | 2026-05-26 17:21:03 +0200 |
| commit | 7c4e909b176f661e834853fa726a6e58acab00e1 (patch) | |
| tree | a2f9c84fd61e8c7fcb71c0c534f4dd7fdfabc7bf /include/linux/mtd | |
| parent | f316b8535887c50be009902bd02098fddb47e2e7 (diff) | |
| download | lwn-7c4e909b176f661e834853fa726a6e58acab00e1.tar.gz lwn-7c4e909b176f661e834853fa726a6e58acab00e1.zip | |
mtd: spi-nor: Improve opcodes documentation
There are two status registers, named 1 and 2. The current wording is
misleading as "1" may refer to the status register ID as well as the
number of bytes required (which, in this case can be 1 or 2).
Clarify the comments by aligning them on the same pattern:
"{read,write} status {1,2} register"
Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Diffstat (limited to 'include/linux/mtd')
| -rw-r--r-- | include/linux/mtd/spi-nor.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index cdcfe0fd2e7d..90a0cf583512 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -21,8 +21,8 @@ /* Flash opcodes. */ #define SPINOR_OP_WRDI 0x04 /* Write disable */ #define SPINOR_OP_WREN 0x06 /* Write enable */ -#define SPINOR_OP_RDSR 0x05 /* Read status register */ -#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */ +#define SPINOR_OP_RDSR 0x05 /* Read status register 1 */ +#define SPINOR_OP_WRSR 0x01 /* Write status register 1 */ #define SPINOR_OP_RDSR2 0x3f /* Read status register 2 */ #define SPINOR_OP_WRSR2 0x3e /* Write status register 2 */ #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */ |