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authorMiquel Raynal <miquel.raynal@bootlin.com>2023-04-19 20:38:10 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2023-04-19 20:38:20 +0200
commit38f1aa5566730cdc5e09ec982c80489d87f0f0a7 (patch)
tree853cc489bbb113b86c0cf22dd4277d0b7fd9e59a /include/linux/mtd
parente6026eb080fa1c1ef6eec24567b733809a5e3018 (diff)
parentdf6def86b9dcbc3e8ed4964c7b79b70c9b0c3040 (diff)
downloadlwn-38f1aa5566730cdc5e09ec982c80489d87f0f0a7.tar.gz
lwn-38f1aa5566730cdc5e09ec982c80489d87f0f0a7.zip
Merge tag 'spi-nor/for-6.4' into mtd/next
SPI NOR core changes: * introduce Read While Write support for flashes featuring several banks * set the 4-Byte Address Mode method based on SFDP data * allow post_sfdp hook to return errors * parse SCCR MC table and introduce support for multi-chip devices SPI NOR manufacturer drivers changes: * macronix: add support for mx25uw51245g with RWW * spansion: - determine current address mode at runtime as it can be changed in a non-volatile way and differ from factory defaults or from what SFDP advertises. - enable JFFS2 write buffer mode for few ECC'd NOR flashes: S25FS256T, s25hx and s28hx - add support for s25hl02gt and s25hs02gt Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/spi-nor.h19
1 files changed, 13 insertions, 6 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index a3f8cdca90c8..cdcfe0fd2e7d 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -343,6 +343,12 @@ struct spi_nor_flash_parameter;
* struct spi_nor - Structure for defining the SPI NOR layer
* @mtd: an mtd_info structure
* @lock: the lock for the read/write/erase/lock/unlock operations
+ * @rww: Read-While-Write (RWW) sync lock
+ * @rww.wait: wait queue for the RWW sync
+ * @rww.ongoing_io: the bus is busy
+ * @rww.ongoing_rd: a read is ongoing on the chip
+ * @rww.ongoing_pe: a program/erase is ongoing on the chip
+ * @rww.used_banks: bitmap of the banks in use
* @dev: pointer to an SPI device or an SPI NOR controller device
* @spimem: pointer to the SPI memory device
* @bouncebuf: bounce buffer used when the buffer passed by the MTD
@@ -376,6 +382,13 @@ struct spi_nor_flash_parameter;
struct spi_nor {
struct mtd_info mtd;
struct mutex lock;
+ struct spi_nor_rww {
+ wait_queue_head_t wait;
+ bool ongoing_io;
+ bool ongoing_rd;
+ bool ongoing_pe;
+ unsigned int used_banks;
+ } rww;
struct device *dev;
struct spi_mem *spimem;
u8 *bouncebuf;
@@ -437,10 +450,4 @@ static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
int spi_nor_scan(struct spi_nor *nor, const char *name,
const struct spi_nor_hwcaps *hwcaps);
-/**
- * spi_nor_restore_addr_mode() - restore the status of SPI NOR
- * @nor: the spi_nor structure
- */
-void spi_nor_restore(struct spi_nor *nor);
-
#endif