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authorJiri Kosina <jkosina@suse.cz>2011-05-18 17:06:31 +0200
committerJiri Kosina <jkosina@suse.cz>2011-05-18 17:06:49 +0200
commit6b7b8e488bbdedeccabdd001a78ffcbe43bb8a3a (patch)
treef2f77cc31b4548745778fca6a51b09e1d8a49804 /include/linux/mtd/nand.h
parentb50f315cbb865079a16a12fd9ae6083f98fd592c (diff)
parentc1d10d18c542278b7fbc413c289d3cb6219da6b3 (diff)
downloadlwn-6b7b8e488bbdedeccabdd001a78ffcbe43bb8a3a.tar.gz
lwn-6b7b8e488bbdedeccabdd001a78ffcbe43bb8a3a.zip
Merge branch 'master' into upstream.
This is sync with Linus' tree to receive KEY_IMAGES definition that went in through input tree.
Diffstat (limited to 'include/linux/mtd/nand.h')
-rw-r--r--include/linux/mtd/nand.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 1f489b247a29..d44192740f6f 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -140,6 +140,7 @@ typedef enum {
NAND_ECC_HW,
NAND_ECC_HW_SYNDROME,
NAND_ECC_HW_OOB_FIRST,
+ NAND_ECC_SOFT_BCH,
} nand_ecc_modes_t;
/*
@@ -339,6 +340,7 @@ struct nand_hw_control {
* @prepad: padding information for syndrome based ecc generators
* @postpad: padding information for syndrome based ecc generators
* @layout: ECC layout control struct pointer
+ * @priv: pointer to private ecc control data
* @hwctl: function to control hardware ecc generator. Must only
* be provided if an hardware ECC is available
* @calculate: function for ecc calculation or readback from ecc hardware
@@ -362,6 +364,7 @@ struct nand_ecc_ctrl {
int prepad;
int postpad;
struct nand_ecclayout *layout;
+ void *priv;
void (*hwctl)(struct mtd_info *mtd, int mode);
int (*calculate)(struct mtd_info *mtd, const uint8_t *dat,
uint8_t *ecc_code);
@@ -413,9 +416,9 @@ struct nand_buffers {
* @select_chip: [REPLACEABLE] select chip nr
* @block_bad: [REPLACEABLE] check, if the block is bad
* @block_markbad: [REPLACEABLE] mark the block bad
- * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific funtion for controlling
+ * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific function for controlling
* ALE/CLE/nCE. Also used to write command and address
- * @init_size: [BOARDSPECIFIC] hardwarespecific funtion for setting
+ * @init_size: [BOARDSPECIFIC] hardwarespecific function for setting
* mtd->oobsize, mtd->writesize and so on.
* @id_data contains the 8 bytes values of NAND_CMD_READID.
* Return with the bus width.
@@ -434,7 +437,7 @@ struct nand_buffers {
* @erase_cmd: [INTERN] erase command write function, selectable due
* to AND support.
* @scan_bbt: [REPLACEABLE] function to scan bad block table
- * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering
+ * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring
* data from array to read regs (tR).
* @state: [INTERN] the current state of the NAND device
* @oob_poi: poison value buffer