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| author | Chunfeng Yun <chunfeng.yun@mediatek.com> | 2017-10-13 17:10:41 +0800 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2017-10-19 10:38:11 +0300 |
| commit | 1a46dfea0841d5ebc08fafe7b3f60d33581f8e27 (patch) | |
| tree | 48d4652ab26767f8868b6d9db0b9626c9a0a0b96 /drivers/usb/mtu3/mtu3_hw_regs.h | |
| parent | a316da82f8d2b9823a2292a7bf84e029fdb3de08 (diff) | |
| download | lwn-1a46dfea0841d5ebc08fafe7b3f60d33581f8e27.tar.gz lwn-1a46dfea0841d5ebc08fafe7b3f60d33581f8e27.zip | |
usb: mtu3: support 36-bit DMA address
add support for 36-bit DMA address
[ Felipe Balbi: fix printk format for dma_addr_t ]
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/mtu3/mtu3_hw_regs.h')
| -rw-r--r-- | drivers/usb/mtu3/mtu3_hw_regs.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/usb/mtu3/mtu3_hw_regs.h b/drivers/usb/mtu3/mtu3_hw_regs.h index 06b29664470f..b6059752dc12 100644 --- a/drivers/usb/mtu3/mtu3_hw_regs.h +++ b/drivers/usb/mtu3/mtu3_hw_regs.h @@ -58,6 +58,8 @@ #define U3D_QCR1 (SSUSB_DEV_BASE + 0x0404) #define U3D_QCR2 (SSUSB_DEV_BASE + 0x0408) #define U3D_QCR3 (SSUSB_DEV_BASE + 0x040C) +#define U3D_TXQHIAR1 (SSUSB_DEV_BASE + 0x0484) +#define U3D_RXQHIAR1 (SSUSB_DEV_BASE + 0x04C4) #define U3D_TXQCSR1 (SSUSB_DEV_BASE + 0x0510) #define U3D_TXQSAR1 (SSUSB_DEV_BASE + 0x0514) @@ -189,6 +191,13 @@ #define QMU_RX_COZ(x) (BIT(16) << (x)) #define QMU_RX_ZLP(x) (BIT(0) << (x)) +/* U3D_TXQHIAR1 */ +/* U3D_RXQHIAR1 */ +#define QMU_LAST_DONE_PTR_HI(x) (((x) >> 16) & 0xf) +#define QMU_CUR_GPD_ADDR_HI(x) (((x) >> 8) & 0xf) +#define QMU_START_ADDR_HI_MSK GENMASK(3, 0) +#define QMU_START_ADDR_HI(x) (((x) & 0xf) << 0) + /* U3D_TXQCSR1 */ /* U3D_RXQCSR1 */ #define QMU_Q_ACTIVE BIT(15) @@ -225,6 +234,7 @@ #define CAP_TX_EP_NUM(x) ((x) & 0x1f) /* U3D_MISC_CTRL */ +#define DMA_ADDR_36BIT BIT(31) #define VBUS_ON BIT(1) #define VBUS_FRC_EN BIT(0) |