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| author | Thierry Reding <treding@nvidia.com> | 2020-03-19 13:27:35 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2020-03-27 11:44:30 +0100 |
| commit | f67499f8ea7c15818d3375d718bd6cde4ae3d4f5 (patch) | |
| tree | 8686e60c92617d16a3ec48b9851b327e75bd2092 /drivers/pinctrl/tegra/pinctrl-tegra194.c | |
| parent | 6e01e0c7a0bebd8626e651181d3592cea8d456c4 (diff) | |
| download | lwn-f67499f8ea7c15818d3375d718bd6cde4ae3d4f5.tar.gz lwn-f67499f8ea7c15818d3375d718bd6cde4ae3d4f5.zip | |
pinctrl: tegra: Do not add default pin range on Tegra194
On Tegra194, almost all of the pin control programming happens in early
boot firmware, so there is no use in having a pin range defined for all
the pins.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-8-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra/pinctrl-tegra194.c')
| -rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra194.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra194.c b/drivers/pinctrl/tegra/pinctrl-tegra194.c index d4e84530158c..61fc7e680788 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra194.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra194.c @@ -134,7 +134,6 @@ static const struct tegra_pingroup tegra194_groups[] = { }; static const struct tegra_pinctrl_soc_data tegra194_pinctrl = { - .ngpios = TEGRA_PIN_NUM_GPIOS, .pins = tegra194_pins, .npins = ARRAY_SIZE(tegra194_pins), .functions = tegra194_functions, |