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| author | Dmitry Osipenko <digetx@gmail.com> | 2018-05-04 01:55:34 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2018-05-16 14:21:32 +0200 |
| commit | c594870756599f23809ab6ba95bee41161601a4a (patch) | |
| tree | 6b281c69164a56f40d3eec120862ae943f739487 /drivers/pinctrl/tegra/pinctrl-tegra.h | |
| parent | ba5554dc184ee03bdadfdef8a4b8a97eddbf55dc (diff) | |
| download | lwn-c594870756599f23809ab6ba95bee41161601a4a.tar.gz lwn-c594870756599f23809ab6ba95bee41161601a4a.zip | |
pinctrl: tegra20: Provide CDEV1/2 clock muxes
Muxing of pins MCLK1/2 determine the muxing of the corresponding clocks.
Make pinctrl driver to provide clock muxes for the CDEV1/2 pingroups, so
that main clk-controller driver could get an actual parent clock for the
CDEV1/2 clocks.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra/pinctrl-tegra.h')
| -rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h index 33b17cb1471e..aa33c20766c4 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.h +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h @@ -16,6 +16,17 @@ #ifndef __PINMUX_TEGRA_H__ #define __PINMUX_TEGRA_H__ +struct tegra_pmx { + struct device *dev; + struct pinctrl_dev *pctl; + + const struct tegra_pinctrl_soc_data *soc; + const char **group_pins; + + int nbanks; + void __iomem **regs; +}; + enum tegra_pinconf_param { /* argument: tegra_pinconf_pull */ TEGRA_PINCONF_PARAM_PULL, |