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author | Oliver O'Halloran <oohall@gmail.com> | 2017-06-27 19:56:12 +1000 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2017-08-11 18:06:16 -0700 |
commit | 1fdadbebc4f617c1ee4a1465ad173cc9e524089d (patch) | |
tree | 384190e78eece0bc5b079a4fda6389c0450f56c6 /drivers/nvdimm | |
parent | b2c48f9f95cba395e16020bef1fdfc248f53030c (diff) | |
download | lwn-1fdadbebc4f617c1ee4a1465ad173cc9e524089d.tar.gz lwn-1fdadbebc4f617c1ee4a1465ad173cc9e524089d.zip |
libnvdimm, pfn, dax: show supported dax/pfn region alignments in sysfs
The alignment of a DAX and PFN regions dictates the page sizes that can
be used to map the region. Even if the hardware page sizes are known the
actual range of supported page sizes that can be used with DAX depends
on the kernel configuration. As a result it's best that the kernel
advertises the alignments that should be used with these region types.
This patch adds the 'supported_alignments' region attribute to expose
this information to userspace.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
[djbw: integrate with nd_size_select_show() rename and other fixups]
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/nvdimm')
-rw-r--r-- | drivers/nvdimm/pfn_devs.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/nvdimm/pfn_devs.c b/drivers/nvdimm/pfn_devs.c index 2ae9a000b090..c500531ca23b 100644 --- a/drivers/nvdimm/pfn_devs.c +++ b/drivers/nvdimm/pfn_devs.c @@ -111,6 +111,29 @@ static ssize_t align_show(struct device *dev, return sprintf(buf, "%ld\n", nd_pfn->align); } +static const unsigned long *nd_pfn_supported_alignments(void) +{ + /* + * This needs to be a non-static variable because the *_SIZE + * macros aren't always constants. + */ + const unsigned long supported_alignments[] = { + PAGE_SIZE, +#ifdef CONFIG_TRANSPARENT_HUGEPAGE + HPAGE_PMD_SIZE, +#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD + HPAGE_PUD_SIZE, +#endif +#endif + 0, + }; + static unsigned long data[ARRAY_SIZE(supported_alignments)]; + + memcpy(data, supported_alignments, sizeof(data)); + + return data; +} + static ssize_t __align_store(struct nd_pfn *nd_pfn, const char *buf) { unsigned long val; @@ -260,6 +283,13 @@ static ssize_t size_show(struct device *dev, } static DEVICE_ATTR_RO(size); +static ssize_t supported_alignments_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return nd_size_select_show(0, nd_pfn_supported_alignments(), buf); +} +static DEVICE_ATTR_RO(supported_alignments); + static struct attribute *nd_pfn_attributes[] = { &dev_attr_mode.attr, &dev_attr_namespace.attr, @@ -267,6 +297,7 @@ static struct attribute *nd_pfn_attributes[] = { &dev_attr_align.attr, &dev_attr_resource.attr, &dev_attr_size.attr, + &dev_attr_supported_alignments.attr, NULL, }; |