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author | Bartosz Golaszewski <bgolaszewski@baylibre.com> | 2016-10-31 15:45:34 +0100 |
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committer | Sekhar Nori <nsekhar@ti.com> | 2016-11-14 17:18:34 +0530 |
commit | 62a8a73923edf97cdc4997a99065045743caddf1 (patch) | |
tree | 02a328bf6067eaa11326784f3e04fb0e3dbafab3 /drivers/memory/Kconfig | |
parent | 1001354ca34179f3db924eb66672442a173147dc (diff) | |
download | lwn-62a8a73923edf97cdc4997a99065045743caddf1.tar.gz lwn-62a8a73923edf97cdc4997a99065045743caddf1.zip |
memory: davinci: add support for da8xx DDR2/mDDR controller
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
[nsekhar@ti.com: subject line adjustment]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'drivers/memory/Kconfig')
-rw-r--r-- | drivers/memory/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 4b4c0c3c3d2f..ec80e35c8dfe 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -134,6 +134,14 @@ config MTK_SMI mainly help enable/disable iommu and control the power domain and clocks for each local arbiter. +config DA8XX_DDRCTL + bool "Texas Instruments da8xx DDR2/mDDR driver" + depends on ARCH_DAVINCI_DA8XX + help + This driver is for the DDR2/mDDR Memory Controller present on + Texas Instruments da8xx SoCs. It's used to tweak various memory + controller configuration options. + source "drivers/memory/samsung/Kconfig" source "drivers/memory/tegra/Kconfig" |