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| author | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2024-05-30 15:35:23 +0200 |
|---|---|---|
| committer | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2024-05-30 23:50:23 +0200 |
| commit | 2adfc4e022f397913a23756a08fbfca3c4ee9c8b (patch) | |
| tree | f26c7bd4b99637de226eb0b666f7e7ee810fcc1b /drivers/gpu/drm | |
| parent | 1c4324793e9bfb5a29c02844023c8ad412fa0467 (diff) | |
| download | lwn-2adfc4e022f397913a23756a08fbfca3c4ee9c8b.tar.gz lwn-2adfc4e022f397913a23756a08fbfca3c4ee9c8b.zip | |
drm/xe: Move XEHP_MTCFG_ADDR register definition to xe_regs.h
We should not define registers directly in the code while we have
dedicated files for all register definitions. Move XEHP_MTCFG_ADDR
to regs/xe_regs.h
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240530133527.1328-2-michal.wajdeczko@intel.com
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_regs.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_mmio.c | 3 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h index 722fb6dbb72e..23e33ec84902 100644 --- a/drivers/gpu/drm/xe/regs/xe_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_regs.h @@ -30,6 +30,9 @@ #define XEHP_CLOCK_GATE_DIS XE_REG(0x101014) #define SGSI_SIDECLK_DIS REG_BIT(17) +#define XEHP_MTCFG_ADDR XE_REG(0x101800) +#define TILE_COUNT REG_GENMASK(15, 8) + #define GGC XE_REG(0x108040) #define GMS_MASK REG_GENMASK(15, 8) #define GGMS_MASK REG_GENMASK(7, 6) diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c index 248e93ec6df7..44bff104c011 100644 --- a/drivers/gpu/drm/xe/xe_mmio.c +++ b/drivers/gpu/drm/xe/xe_mmio.c @@ -28,9 +28,6 @@ #include "xe_sriov.h" #include "xe_tile.h" -#define XEHP_MTCFG_ADDR XE_REG(0x101800) -#define TILE_COUNT REG_GENMASK(15, 8) - #define BAR_SIZE_SHIFT 20 static void |