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authorKonrad Dybcio <konrad.dybcio@linaro.org>2024-08-28 17:06:56 +0200
committerRob Clark <robdclark@chromium.org>2024-09-01 08:17:54 -0700
commitd50a8363c2f595bbd2411b8b5a5325f3fefe9871 (patch)
treeb181c92c034359756004cd5a7f0b92f14306dbef /drivers/gpu/drm/msm/adreno/a6xx_gpu.h
parent2bbb5fe3905500a895d7a593c1191be2fa1288d7 (diff)
downloadlwn-d50a8363c2f595bbd2411b8b5a5325f3fefe9871.tar.gz
lwn-d50a8363c2f595bbd2411b8b5a5325f3fefe9871.zip
drm/msm/a6xx: Store correct gmu_cgc_mode in struct a6xx_info
Store the correct values that we happen to have for some A7xx SKUs in the GPU info struct and fill out the missing information for A6xx GPUs based on downstream kernel information. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/611094/ [add missing entry to a615 catalog to resolve conflict] Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a6xx_gpu.h')
-rw-r--r--drivers/gpu/drm/msm/adreno/a6xx_gpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
index bc37bd8c7f65..0fb7febf70e7 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
@@ -22,6 +22,7 @@ struct a6xx_info {
const struct adreno_reglist *hwcg;
const struct adreno_protect *protect;
u32 gmu_chipid;
+ u32 gmu_cgc_mode;
u32 prim_fifo_threshold;
};