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authorMahesh Kumar <mahesh1.kumar@intel.com>2018-06-11 17:25:11 -0700
committerPaulo Zanoni <paulo.r.zanoni@intel.com>2018-06-12 14:12:34 -0700
commitaf1f1b81130e82a1ee62fe48aa09e6bdab6e68f4 (patch)
treeee1f6eec9d783453e173701674a5240b79e716c3 /drivers/gpu/drm/i915/intel_hdmi.c
parentdccc7228b5de7658f79ad0074a57a8798462c533 (diff)
downloadlwn-af1f1b81130e82a1ee62fe48aa09e6bdab6e68f4.tar.gz
lwn-af1f1b81130e82a1ee62fe48aa09e6bdab6e68f4.zip
drm/i915/icl: fix gmbus gpio pin mapping
ICP has GPIO pin 1/2 mapped to combo-phy ports & GPIO pins 9/10/11/12 mapped to tc ports[1-4]. This patch defines GPIOCTL registers for GPIO pins 9-12 & uses them in GPIO pin mapping table. Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Madhav Chauhan <madhav.chauhan@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180612002512.29783-1-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_hdmi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index ba5ea61fb7b9..ef4de5a02cb5 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2234,7 +2234,7 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
ddc_pin = bxt_port_to_ddc_pin(dev_priv, port);
else if (HAS_PCH_CNP(dev_priv))
ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);
- else if (IS_ICELAKE(dev_priv))
+ else if (HAS_PCH_ICP(dev_priv))
ddc_pin = icl_port_to_ddc_pin(dev_priv, port);
else
ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);